Nonvolatile Memory Device Voltage Control for Write Reliability
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Solution Overview
Problem
Miniaturization of NAND-type flash memories has led to reliability issues during write operations, with increased risk of write errors due to interference between memory cells.
Innovation Solution
The implementation of a nonvolatile semiconductor memory device with a memory cell array that includes dummy memory cells at the ends of the memory string, where a program voltage is applied to selective memory cells and a first write pass voltage lower than the program voltage is applied to adjacent nonselective word lines, with a second write pass voltage higher than the first applied to other nonselective word lines, to prevent over-programming and reduce interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are miniaturized to increase storage density, then storage capacity is improved, but write operation reliability deteriorates due to increased interference between memory cells
Solution Approach 1:
The patent applies different voltage levels to different groups of nonselective word lines based on their position relative to selective word lines. Specifically, nonselective word lines adjacent to selective word lines receive a first write pass voltage, while other nonselective word lines receive a second write pass voltage. This localized differentiation reduces interference effects in critical areas while maintaining overall write operation reliability, thereby resolving the contradiction between miniaturization and write reliability.
2Device complexity
If a single write pass voltage is applied to all nonselective word lines, then device complexity is reduced, but write errors increase due to unequal voltage distribution across memory cells
Solution Approach 1:
The patent segments nonselective word lines into two distinct groups: those adjacent to selective word lines and those not adjacent. Each group is assigned a different write pass voltage level. This segmentation allows for more precise control of voltage distribution across memory cells, ensuring equal write conditions without requiring complex individualized voltage control for each word line, thus resolving the contradiction between device complexity and write reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach suppresses write errors and improves reliability by ensuring that all memory cells receive a write operation under equal conditions, reducing the probability of incorrect data storage.
Implementation Method 1
a program voltage Vpgm (for example, a voltage of 20 V or higher) is applied to a control gate of memory cells that are going to be written (i.e., selective memory cells), and electric charges are stored in a floating gate of selective memory cells
Implementation Method 2
a write bypass voltage Vpass (for example, about 8 to 10 V), which is a level at which a threshold voltage is not changed, is applied to a control gate of memory cells that are not going to be written (i.e., nonselective memory cells), and the nonselective memory cells are set to an on state
Data Source
AI summary
According to one embodiment, a control circuit of a memory cell array is configured to write data to a memory cell array by applying a first write pass voltage, which is lower than the program voltage, to a first group of nonselective word lines adjacent to a selective word line. The control circuit is further configured to apply a second write pass voltage, which is higher than the first write pass voltage, to a second group of second nonselective word lines, the second group not including the word lines of the first group.