Nonvolatile Memory Word Line Precharge for Data Reliability
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Solution Overview
Problem
The high degree of integration in semiconductor storage devices leads to reliability issues due to data damage, necessitating a method to improve the reliability of nonvolatile memory devices.
Innovation Solution
A nonvolatile memory device with a word line precharge operation that involves a ready/busy signal pin to indicate a precharge busy state, followed by applying word line precharge voltages and transitioning to a ready state, enhancing data reliability without accessing memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the degree of integration of the storage device is increased, then manufacturing cost is reduced, but data reliability deteriorates due to data damage
Solution Approach 1:
The patent applies preliminary action by performing word line precharge operations before actual memory access operations. The precharge operation prepares the word lines by applying appropriate voltages in advance, preventing hot electron injection and hot carrier injection that would otherwise occur during subsequent access operations. This preliminary preparation ensures data reliability is maintained even as integration density increases.
Solution Approach 2:
The patent implements preliminary anti-action by applying counter-voltages to word lines before access operations can cause harmful effects. The precharge operation applies specific voltages (e.g., Vcc or Vss) to word lines in advance, creating a protective state that prevents hot electron injection and hot carrier injection during subsequent read or program operations, thereby counteracting potential data damage mechanisms.
2Reliability
If word line precharge operation is performed, then data reliability is improved, but device availability deteriorates during precharge process
Solution Approach 1:
The patent applies periodic action by implementing word line precharge operations at specific intervals and timing moments. Rather than continuously precharging all word lines, the system performs precharge operations periodically - before batch access operations, after certain time intervals, or when transitioning between different operational states. This periodic approach maintains data reliability while minimizing the impact on device availability and throughput.
Solution Approach 2:
The patent implements partial action by selectively precharging only certain word lines that are likely to be accessed next, rather than precharging all word lines in the array. The row decoder identifies and applies precharge voltages to specific word lines based on access patterns or operational context, reducing the overall precharge time and maintaining higher device availability while still protecting critical data regions.
Data Source
AI summary
A nonvolatile memory device performs a method which includes: causing a ready/busy signal pin of the nonvolatile memory device to indicate that the nonvolatile memory device is in a precharge busy state wherein the nonvolatile memory device is not available to perform memory access operations for its nonvolatile memory cells; applying one or more word line precharge voltages to one or more selected word lines among a plurality of word lines of the nonvolatile memory device to precharge the selected word lines; and, after at least a portion of the precharge operation, causing the ready/busy signal pin to transition from indicating the precharge busy state, to indicating that the nonvolatile memory device is in a ready state wherein the nonvolatile memory device is available to perform memory access operations for its nonvolatile memory cells.