Nonvolatile Memory Device Threshold Voltage Stability

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Solution Overview

Problem

As semiconductor memory devices are scaled down for higher integration and capacity, they face issues that can lead to data loss and decreased reliability, particularly due to the need for repeated dummy read operations to maintain threshold voltage stability.

Innovation Solution

A nonvolatile memory device that applies a cure voltage to all word lines in response to a specific command, eliminating the need for multiple dummy read operations by directly maintaining threshold voltage stability through a cure operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the storage device is scaled down for high degree of integration, then manufacturing cost is reduced, but data reliability deteriorates due to threshold voltage instability

Engineering Contradiction:
Improvemanufacturing costVSAvoiddata reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies a turn-on voltage to all word lines connected with a memory block before performing read operations. This preliminary action stabilizes the threshold voltage of memory cells in advance, preventing data loss that would otherwise require repeated dummy read operations, thereby maintaining reliability while using scaled-down devices

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent preemptively counteracts threshold voltage degradation by applying a turn-on voltage to all word lines before read operations. This preliminary anti-action prevents the harmful effect of threshold voltage instability, eliminating the need for corrective dummy read operations and improving data reliability in scaled-down devices

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If dummy read operations are performed repeatedly to maintain threshold voltage stability, then data reliability is improved, but operational efficiency deteriorates

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies a turn-on voltage to all word lines before read operations to stabilize threshold voltage in advance. This preliminary action eliminates the need for repeated dummy read operations, maintaining data reliability while significantly improving operational efficiency by removing unnecessary operation cycles

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and eliminates the need for dummy read operations by implementing a turn-on voltage application mechanism. This removes the harmful redundant operations from the system, improving productivity while maintaining the necessary threshold voltage stability through the extracted turn-on voltage mechanism

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12020758B2Nonvolatile memory device, storage device including nonvolatile memory device, and operating method of storage device
Publication Date: 2024.06.25 SAMSUNG ELECTRONICS CO LTD
  • US12020758B2 patent drawing
  • US12020758B2 patent drawing
  • US12020758B2 patent drawing

AI summary

Disclosed is a storage device, which includes a nonvolatile memory device including a first memory block connected with a plurality of first word lines, and a memory controller connected with the nonvolatile memory device through a plurality of data lines. The memory controller sends a first command to the nonvolatile memory device through the plurality of data lines during a first command input period, sends a parameter to the nonvolatile memory device through the plurality of data lines during an address input period, and sends a second command to the nonvolatile memory device through the plurality of data lines during a second command input period. The nonvolatile memory device applies a turn-on voltage to all the plurality of first word lines connected with the first memory block based on the parameter during a first time in response to the first command and the second command.