Nonvolatile SRAM Cell With Three-Terminal MTJ for SNM

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Solution Overview

Problem

Conventional SRAM cells with integrated two-terminal magnetoresistance change memory elements suffer from degraded static noise margin and reliability due to shared paths for reading and writing, leading to increased standby power consumption and reduced resistance to information alteration.

Innovation Solution

A nonvolatile SRAM cell design incorporating domain wall displacement elements with three-terminal structures, where the MTJ unit is connected in series to the source of the drive transistor, allowing for orthogonal current application to reverse magnetization and alter resistance, thereby reducing standby power consumption and enhancing data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If a two-terminal MTJ element is used in conventional SRAM cells, then nonvolatile memory functionality is achieved, but static noise margin is degraded

Engineering Contradiction:
Improvedata retentionVSAvoidstatic noise margin
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The memory element is divided into three separate terminals: a first terminal for writing data, a second terminal for reading data, and a third terminal for reference. This segmentation separates the write and read paths, allowing independent optimization of each function and preventing the degradation of static noise margin that occurs when the same path is used for both operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A reference electrode (third terminal) is introduced as an intermediary element that provides a stable reference potential for the magnetoresistive measurement. This reference terminal enables accurate reading of the MTJ element state without requiring current to flow through the same path used for writing, thereby maintaining static noise margin.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the same path is used for reading and writing in two-terminal MTJ elements, then device complexity is reduced, but resistance to information alteration is lowered

Engineering Contradiction:
Improvememory element structureVSAvoidresistance to information alteration
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The memory element is divided into three separate terminals: a first terminal for writing data, a second terminal for reading data, and a third terminal for reference. This segmentation separates the write and read paths, allowing independent optimization of each function and preventing the degradation of static noise margin that occurs when the same path is used for both operations.

Inventive Principle:
Principle #1Segmentation

3Speed

If SRAM is used as cache memory, then high-speed operation is achieved, but standby power consumption increases

Engineering Contradiction:
Improveoperation speedVSAvoidstandby power consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent changes the fundamental parameter of memory volatility by incorporating magnetoresistive elements that can retain data without power. The MTJ element's resistance state (high or low) represents binary data and is maintained due to magnetic anisotropy energy barriers, enabling the SRAM to transition from volatile to nonvolatile operation and eliminate standby power consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a hybrid memory cell that combines conventional SRAM transistor structures with magnetoresistive MTJ elements. This composite structure integrates the high-speed switching capability of transistors with the nonvolatile data storage capability of magnetic materials, achieving both speed and energy efficiency.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design maintains high-speed SRAM operation while reducing standby power consumption and improving data reliability by using domain wall displacement elements to store data nonvolatively, preventing SNM degradation and stress on MTJ units.

Implementation Method 1

A three-terminal domain wall displacement element is a nonvolatile memory element formed with a domain wall displacement unit that records data, and an MTJ unit that reads data. When current flowing in a direction orthogonal to the domain wall is applied to the nonvolatile memory element, the domain wall moves in the direction of electrons. As a result, the magnetization direction of the MTJ unit is reversed, and the resistance value changes.

Methodology Applied
Scientific EffectDomain wall displacement:

Implementation Method 2

a two-terminal magnetoresistance change memory element (MTJ element)

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS9711219B2Storage device including magnetic elements
Publication Date: 2017.07.18 KIOXIA CORP
  • US9711219B2 patent drawing
  • US9711219B2 patent drawing
  • US9711219B2 patent drawing

AI summary

A storage device according to an embodiment includes: first and second magnetic elements each including: a reference layer connected to a third terminal; a first magnetic layer including first through third magnetic regions; a nonmagnetic layer; a second magnetic layer connected to a first terminal and the first magnetic region; and a third magnetic layer connected to a second terminal and the third magnetic region; a first inverter including a p-channel first transistor, an n-channel second transistor, a first input terminal connected to the second terminal of the second magnetic element, and a first output terminal connected to the first terminal of the first magnetic element; and a second inverter including a p-channel third transistor, an n-channel fourth transistor, a second input terminal connected to the second terminal of the first magnetic element, and a second output terminal connected to the first terminal of the second magnetic element.