Nonvolatile Storage Readout Circuit for Reduced Cell Stress
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Solution Overview
Problem
Existing nonvolatile storage devices face accelerated deterioration due to excessive stress on memory cells when writing and reading complementary data, as they rely on determining detection currents relative to a reference current, which can lead to inefficient and potentially damaging verification processes.
Innovation Solution
The device employs a readout circuit that reads complementary data by comparing detection currents directly or through the addition or subtraction of reference currents, allowing for more precise verification without excessive stress on memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complementary data is written and verified by comparing detection currents with reference current in existing nonvolatile storage devices, then data verification can be performed, but excessive stress is applied to memory cells causing accelerated deterioration
Solution Approach 1:
The patent changes the verification parameter from comparing detection current with reference current to comparing the difference between first and second detection currents with a reference voltage. This parameter transformation eliminates the need for excessive current stress while maintaining verification accuracy, thereby resolving the contradiction between reliable data verification and memory cell lifespan preservation
Solution Approach 2:
The patent introduces a reference voltage as an intermediary element in the verification process. Instead of directly comparing currents (which causes stress), the difference current is converted to a voltage and compared with the reference voltage. This intermediary approach enables accurate verification without applying excessive stress to the memory cells
2Measurement precision
If repeated writing is performed to satisfy verification conditions in existing nonvolatile storage devices, then data accuracy can be ensured, but writing time increases and memory cells undergo excessive stress
Solution Approach 1:
The patent transforms the verification parameter from current comparison to voltage comparison of the difference current. This change enables more accurate and stable verification in a single operation, eliminating the need for repeated writing cycles and thereby reducing the time loss while maintaining high data accuracy
3Measurement precision
If detection current comparison is performed in existing nonvolatile storage devices, then complementary data can be verified, but the verification process applies excessive stress to memory cells
Solution Approach 1:
The patent introduces a reference voltage as an intermediary to compare against the difference voltage rather than directly comparing detection currents. This intermediary voltage comparison method achieves precise verification while avoiding the harmful stress that would result from direct current comparison
Solution Approach 2:
The patent changes the verification parameter from current to voltage. By measuring the voltage corresponding to the difference current and comparing it with a reference voltage, the system achieves accurate verification without applying excessive current stress to the memory cells
Data Source
AI summary
A nonvolatile storage device includes a memory cell array having a plurality of nonvolatile memory cells, and a readout circuit reading out data from the memory cell array. In a first mode, the readout circuit reads out complementary data by comparing a first detection current flowing through a first memory cell with a second detection current flowing through a second memory cell. In a second mode, the readout circuit reads out the complementary data by comparing a current obtained by addition or subtraction of a first reference current to or from the first detection current with the second detection current, or reads out the complementary data by comparing the first detection current with a current obtained by addition or subtraction of a second reference current to or from the second detection current.


