NOR Flash LTDR Testing with Three-Stage Die Screening
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Solution Overview
Problem
Current memory testing methods for low temperature data retention (LTDR) in NOR flash memory require lengthy idle periods, leading to increased research and development costs due to time lags and delays in the product cycle.
Innovation Solution
A three-stage testing method involving first, second, and third stage tests, with flags set to indicate suspected good dies, allowing for quicker assessment of die performance based on idle times and voltage comparisons, using a clamp, storage device, and test control device to manage and analyze memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a long idle period is used to test LTDR compliance, then the reliability of the test result is improved, but the time required for testing increases significantly
Solution Approach 1:
The patent divides the single long idle period into multiple shorter idle periods (first idle period, second idle period, third idle period) separated by test stages. This segmentation allows the testing process to be broken down into manageable stages, reducing the continuous time loss while maintaining test reliability through progressive validation.
Solution Approach 2:
The patent performs preliminary testing in the first stage test before the complete idle period elapses. By conducting the first stage test after the first idle period and identifying suspected good dies, the system performs preliminary action to filter out obviously failed dies early, reducing the need to idle all dies for the full duration.
2Device complexity
If a single-stage testing method is used, then the testing process is simple, but the accuracy of identifying good and fail dies decreases
Solution Approach 1:
The testing process is segmented into three distinct stages, each with specific test conditions and evaluation criteria. This segmentation enables progressive refinement of die classification, improving identification accuracy by eliminating ambiguous cases through multiple evaluation opportunities rather than relying on a single test result.
Solution Approach 2:
The patent implements feedback mechanisms where test results from each stage inform subsequent testing decisions. The test control device uses feedback from the first stage test to identify suspected good dies, and feedback from the second stage test to determine final classification, thereby improving measurement precision through iterative validation.
3Measurement precision
If multiple testing stages are implemented, then the accuracy of die identification is improved, but the device complexity increases
Solution Approach 1:
The test control device is designed with multi-functionality to handle all three testing stages and various test patterns. This universal device can perform different test operations, manage idle periods, track die states, and implement decision logic for multiple stages, thereby managing the increased complexity through a consolidated multi-functional system rather than separate specialized devices.
Data Source
AI summary
A method and an apparatus for memory testing are provided. The method includes following steps: after multiple dies are idle for a first time, performing a first stage test on the dies, and setting multiple flags corresponding to the dies that fail the first stage test to a first logic level; after the dies are idle for a second time, performing a second stage test on the dies, and regarding the dies that pass the second stage test and have the corresponding flags set to the first logic level as suspected good dies and keeping the suspected good dies idle; and after the suspected good dies are idle for a third time, performing a third stage test on the suspected good dies.