NRZ Driver Superposition for PAM Interface Testing

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Solution Overview

Problem

Current test devices face challenges in efficiently testing memory devices with pulse amplitude modulation (PAM) interfaces using non-return to zero (NRZ) interfaces without the need for expensive interface conversion components, limiting cost-effectiveness and practicality in mass production.

Innovation Solution

A test system and method that utilize a test device with NRZ interface circuitry to generate and superpose NRZ signals, enabling the creation of a PAM signal for testing PAM interface devices without requiring separate PAM interface circuitry, by using a logic generation/determination device and drivers to output NRZ signals via multiple channels, which are then superposed to form a PAM signal for the device under test.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a test device uses NRZ interface circuitry to test PAM interface devices, then the cost of developing and manufacturing test devices is reduced, but the ability to directly test PAM interfaces is compromised

Engineering Contradiction:
Improvecost of developing and manufacturing test devicesVSAvoidability to test PAM interfaces
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The test device segments the PAM signal generation task by using multiple independent NRZ signal generation channels. Each channel generates a separate NRZ signal that will later be combined to form the complete PAM signal, allowing the test device to leverage existing NRZ circuitry while achieving PAM testing capability through systematic combination of segmented signals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple NRZ signals from different channels by voltage-superposing them to create a PAM signal. This combining operation transforms the output of multiple simple NRZ signal generators into a complex PAM signal with multiple voltage levels, enabling the test device to test PAM interfaces without requiring complex PAM signal generation circuitry in each channel.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If separate PAM interface circuitry is used in the test device, then the ability to test PAM interfaces is maintained, but the cost and complexity of the test device increases

Engineering Contradiction:
Improveability to test PAM interfacesVSAvoidcomplexity of test device
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The test device achieves universality by designing each channel to perform multiple functions: generating NRZ signals for testing, and through voltage-superposition, contributing to the formation of PAM signals. This multi-functionality allows the same hardware infrastructure to serve both simple NRZ testing and complex PAM testing, eliminating the need for separate dedicated PAM interface circuitry.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The voltage-superposition mechanism acts as an intermediary that bridges the gap between simple NRZ signal generation and complex PAM signal requirements. By introducing this intermediary combining stage, the system can use simple NRZ generators to produce PAM signals, avoiding the need for complex PAM generators while maintaining testing capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If multiple NRZ signals are voltage-superposed to create a PAM signal, then PAM interface testing is enabled using NRZ circuitry, but the precision of signal generation and voltage level control becomes more difficult

Engineering Contradiction:
Improveability to test PAM interfacesVSAvoidprecision of voltage level control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by assigning specific voltage levels to specific channels based on their role in the superposition. Each channel is configured with a particular voltage characteristic that contributes to the final PAM signal in a controlled manner, ensuring that the overall voltage level distribution meets PAM specifications through localized optimization of individual channel properties.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the costs associated with developing and manufacturing test devices and memory devices by allowing PAM interface testing using NRZ interface circuitry, improving cost-effectiveness and practicality without the need for additional expensive components, while maintaining the ability to accurately determine logic states and voltage levels of test results.

Implementation Method 1

a superposition line configured to provide a pulse amplitude modulation (PAM) signal, which is generated to satisfy a PAM operation by voltage-superposing the first NRZ signal and the second NRZ signal

Methodology Applied
Scientific EffectVoltage superposition:

Data Source

PatentUS12111351B2Test devices, test systems, and operating methods of test systems
Publication Date: 2024.10.08 SAMSUNG ELECTRONICS CO LTD
  • US12111351B2 patent drawing
  • US12111351B2 patent drawing
  • US12111351B2 patent drawing

AI summary

A test device configured to test a device under test (DUT) performing an interface of a pulse amplitude modulation (PAM) operation includes a logic generation/determination device configured to generate multiple bits corresponding to a test pattern, first and second drivers configured to generate respective first and second non return to zero (NRZ) signals according to a logic state of respective first and second bits among the multiple bits and output the respective generated first and second NRZ signals via respective first and second channels. The first NRZ signal has a first high level or a first low level according to the logic state of the first bit, and the second NRZ signal has a second high level or a second low level according to the logic state of the second bit. The first and second high levels are different from each other.