Centralized Non-System-Memory Gateway Circuit for SoC Routing
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Solution Overview
Problem
The increasing number of components in computer systems leads to complexity in non-DRAM transactions within System on a Chip (SoC) architectures, resulting in heightened bandwidth requirements and latency, which reduces performance benefits.
Innovation Solution
A centralized non-system-memory gateway circuit (NSM GW) is introduced to route non-DRAM transactions, offloading functions like address decoding, error handling, and security, thereby simplifying network interfaces and reducing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of components in computer systems increases, then system functionality and capability are improved, but non-DRAM transaction complexity and latency increase
Solution Approach 1:
A centralized non-system-memory gateway circuit is introduced as an intermediary component between agent circuits and system memory. This gateway handles all non-DRAM transactions (configuration, initialization, error handling) centrally, reducing the complexity burden on individual agent circuits and their network interfaces while enabling increased system functionality through modular agent circuit design
2Adaptability or versatility
If the number of components in computer systems increases, then system functionality is improved, but bandwidth requirements and latency increase
Solution Approach 1:
The centralized gateway circuit acts as a mediator that consolidates non-DRAM transaction routing functions. By centralizing address decoding, error handling, and security functions in the gateway, the network interfaces of agent circuits are simplified, reducing their processing overhead and enabling faster transaction completion with lower latency despite increased system functionality
3Adaptability or versatility
If network interfaces include dedicated routing storage for all possible destinations, then routing capability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the complex routing storage and address decoding functions from individual network interfaces and consolidates them into a centralized non-system-memory gateway circuit. Each agent circuit's network interface only needs minimal routing storage for the gateway, while the gateway maintains comprehensive routing capability for all possible agent circuit destinations, dramatically reducing per-node complexity while preserving full routing adaptability
Data Source
AI summary
A computer system with a central, non-system memory (NSM) gateway circuit for routing non-DRAM transactions between agent circuits coupled to a plurality of networks of the computer system, which may include packet-switching capabilities. Such non-DRAM transactions may be routed via a virtual channel in some implementations. To facilitate handling of such transactions, the NSM gateway circuit may include dedicated routing storage (e.g., an input buffer for each source agent circuit on each of the plurality of networks and an output buffer for each destination agent circuit on each of the plurality of networks). The NSM gateway circuit may serve as a termination point for non-DRAM transactions within the computer system, allowing network credit for a message included in a non-DRAM transaction to be returned to a source agent circuit prior to delivery to one or more destination agent circuits.