Contention-Free Routing for NTT/iNTT Tile Arrays
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Solution Overview
Problem
Existing methods for data movement between tiles in parallel processing devices for NTT/iNTT operations require significant silicon area and reduce throughput, leading to congestion and inefficiency in interconnect fabrics.
Innovation Solution
A scalable and reconfigurable parallel processing device with programmable contention-free routing schedules and tile router architecture that stalls routing of computation results to minimize congestion and improve throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated point-to-point connections are used for data movement between tiles, then routing reliability is improved, but silicon area increases significantly
Solution Approach 1:
The interconnect fabric is designed as a shared resource that multiple tiles can use simultaneously for data movement. The mesh-based interconnect allows any tile to communicate with any other tile through a common network, eliminating the need for dedicated point-to-point connections between tile pairs. This multi-functional shared interconnect achieves routing reliability through proper routing algorithms while using significantly less silicon area.
Solution Approach 2:
The patent introduces intermediate nodes and buffering mechanisms in the mesh interconnect fabric that act as mediators for data movement. These intermediaries enable reliable data transmission between tiles by providing temporary storage, error handling, and flow control, replacing the need for direct dedicated connections while maintaining reliability.
2Productivity
If more routing channels are provided for NTT/iNTT operations, then throughput is improved, but congestion in interconnect fabric increases
Solution Approach 1:
The patent implements periodic routing schedules that alternately activate different routing channels for NTT and iNTT operations. By time-multiplexing the use of routing channels and introducing controlled periodic activation patterns, the system achieves high throughput while preventing simultaneous congestion on multiple channels. The periodic stalling of certain channels allows others to clear accumulated data.
Solution Approach 2:
The routing configuration is made dynamic and reconfigurable based on workload characteristics. The system can adaptively enable or disable specific routing channels depending on current operation types (NTT vs. iNTT), data flow patterns, and congestion levels. This dynamic adjustment optimizes throughput while avoiding congestion by activating only the necessary channels at any given time.
3Productivity
If contention-free routing schedules are implemented, then throughput is improved, but device complexity increases
Solution Approach 1:
The patent pre-computes and stores optimal routing schedules in lookup tables before execution. These contention-free routing schedules are determined offline and loaded into the routing control logic, eliminating the need for complex real-time routing decisions. The preliminary preparation of routing paths enables high throughput while keeping the actual routing control simple and deterministic.
Solution Approach 2:
The system uses simple parameter-based routing decisions rather than complex algorithms. By changing routing parameters (such as selecting specific channels or time slots) based on pre-determined schedules, the system achieves contention-free operation. The complexity is shifted from runtime decision-making to parameter configuration, simplifying the actual routing control logic during execution.
Data Source
AI summary
Examples include techniques for contention-free routing for number-theoretic-transform (NTT) or inverse-NTT (iNTT) computations routed through a parallel processing device. Examples include a tile array that includes a plurality of tiles arranged in a 2-dimensional mesh interconnect-based architecture. Each tile includes a plurality of compute elements configured to execute NTT or iNTT computations associated with a fully homomorphic encryption workload. Contention-free routing to include use of selective stalls and destination ports indicated in routing tables maintained at tiles of the tile array can facilitate NTT/iNTT computation throughput through the parallel processing device.