Non-volatile Storage Trial Programming Voltage Calibration
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Solution Overview
Problem
Existing non-volatile semiconductor memory devices face challenges in optimizing the program voltage magnitude due to factors like charge trapping, temperature variations, and device usage, leading to inefficiencies in programming speed and risk of over-programming, especially as devices age.
Innovation Solution
A trial programming process is performed to dynamically adjust the initial magnitude of programming pulses based on threshold voltage ranges identified in a first set of non-volatile storage elements, allowing for calibrated programming of a second set of elements to optimize programming efficiency and prevent over-programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the program voltage magnitude is set high to ensure programming speed, then programming speed is improved, but over-programming occurs especially in older devices
Solution Approach 1:
The patent applies dynamics by making the program voltage magnitude adjustable based on device state. The system transitions from a static, fixed program voltage to a dynamic voltage that adapts to whether the device is fresh or old, thereby optimizing both programming speed and reliability under different conditions
Solution Approach 2:
The patent changes the parameter of program voltage magnitude based on device usage state. By detecting whether a device is fresh or old and adjusting the voltage magnitude accordingly, the system achieves fast programming for fresh devices while preventing over-programming in older devices
2Reliability
If the program voltage magnitude is set low to prevent over-programming in old devices, then reliability is improved, but programming speed decreases for fresh devices
Solution Approach 1:
The system dynamically adjusts program voltage based on device state, using higher voltages for fresh devices to maximize programming speed and lower voltages for older devices to prevent over-programming, thereby resolving the contradiction between speed and reliability
Solution Approach 2:
The patent changes the program voltage parameter adaptively based on whether the device is fresh or old, allowing the system to achieve both fast programming and reliable operation by selecting appropriate voltage levels for each device state
3Device complexity
If a single program voltage is used for all device states, then device complexity is reduced, but programming efficiency deteriorates due to suboptimal performance
Solution Approach 1:
The patent applies local quality by treating fresh devices and old devices differently with separate program voltage settings. This allows each device state to receive optimized programming parameters, improving overall programming efficiency while maintaining manageable system complexity through state-based differentiation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures efficient and balanced programming across different device states, maintaining speed and accuracy while preventing over-programming, even as devices age, by dynamically adjusting the programming signal based on sensed threshold voltage information.
Implementation Method 1
The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
Implementation Method 2
When programming an EEPROM or flash memory device, such as a NAND flash memory device, typically a program voltage is applied to the control gate and the bit line is grounded. Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised
Data Source
AI summary
A trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-volatile storage system. Based on this trial programming, a programming signal is calibrated by adjusting its initial magnitude. The calibrated programming signal is then used to program a second set of non-volatile storage elements (which may or may not include the first set).