NVM Controller Dynamic ECC Adjustment for Reliability
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Solution Overview
Problem
Non-volatile memory (NVM) devices, particularly flash memories, face challenges in maintaining reliability and extending their operating lifetime due to increasing memory densities, which require higher error correction coding (ECC) levels that previous memory controllers may not support, leading to reduced data retention and increased bit error rates over time.
Innovation Solution
Implementing a method where a non-volatile memory controller dynamically adjusts its error correction coding capability and operating modes based on current operating conditions, transitioning to lower bit error levels and higher ECC capabilities when necessary, to maintain reliability and extend the operating lifetime of NVM devices by monitoring and optimizing bit error levels and ECC capabilities across memory pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory density is increased, then storage capacity is improved, but reliability deteriorates due to higher bit error rates
Solution Approach 1:
The patent implements dynamic adjustment of read reference levels based on monitored bit error rates. The system transitions from static reference levels to adaptive reference levels that change over time to compensate for aging effects and maintain reliability in high-density memory
Solution Approach 2:
The system changes operational parameters (read reference levels) to maintain reliability. By adjusting the reference levels used during read operations, the system compensates for threshold voltage shifts and maintains accurate data retrieval despite increased memory density
2Reliability
If error correction coding capability is increased, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where the controller monitors bit error rates during read operations and uses this information to adjust read reference levels. This closed-loop control maintains reliability without requiring more complex error correction coding
Solution Approach 2:
The system performs self-adjustment by automatically monitoring its own performance and correcting issues through adaptive reference level adjustment, eliminating the need for external intervention or more complex error correction hardware
3Duration of action of stationary object
If operating time is extended, then lifetime is improved, but bit error levels increase due to aging
Solution Approach 1:
The system performs preliminary monitoring of bit error rates and proactively adjusts read reference levels before errors become critical. This preventive approach extends the operational lifetime by maintaining reliability throughout the memory's life cycle
Solution Approach 2:
The patent implements continuous adaptation of read reference levels throughout the memory's operating lifetime. This dynamic adjustment compensates for aging effects such as threshold voltage shifts, enabling the memory to maintain reliability well beyond typical operational expectations
Data Source
AI summary
Various embodiments are related to non-volatile memories, systems, and methods of using such. Some instances provide a computer readable medium that includes instructions executable by one or more processors of an NVM controller for controlling a NVM using memory pages where the NVM controller having a predefined error correction coding, ECC, capability (ECCCTRL). Executing the instructions may cause the NVM controller to: perform a monitoring process and perform a transitioning process.