Non-Volatile Memory Data Folding for Storage Density
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Solution Overview
Problem
Conventional non-volatile memory devices face challenges in achieving high performance and capacity due to limitations in read/write operations, particularly with increasing density leading to neighboring field coupling errors and the need for more precise programming in multi-state implementations.
Innovation Solution
A non-volatile memory system with a controller and memory circuit that rearranges data from a binary format to a multi-state format within the memory array, using a processor to efficiently manage data and error correction codes, and employing a local data bus for internal data transfer to enhance read/write performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in binary format in conventional non-volatile memory, then the memory structure is simple and manufacturing is easier, but storage capacity and density are limited
Solution Approach 1:
The patent changes the parameter of data representation from binary (2 states) to multi-state (N states per cell), enabling each memory cell to store multiple bits of information. This parameter change directly increases storage capacity while the patent manages the resulting complexity through systematic data rearrangement methods
Solution Approach 2:
The patent segments the data storage function across multiple word lines, reading data from N different word lines and combining them to form multi-state data in each cell. This segmentation approach allows the system to achieve high capacity while managing complexity through distributed data organization
2Quantity of substance
If memory density is increased to improve storage capacity, then more data can be stored, but neighboring field coupling errors increase
Solution Approach 1:
The patent introduces an intermediary data rearrangement process that occurs within the memory device itself, using local data buses and processing circuits to shuffle and reorganize data before writing to multi-state cells. This intermediary process enables precise control over data placement, reducing neighboring field coupling errors while maintaining high density
Solution Approach 2:
The patent implements feedback mechanisms through error correction codes and verification processes that monitor and correct programming errors. The system reads back programmed data, detects errors caused by field coupling, and applies corrections to ensure reliable storage at high densities
3Productivity
If external reformatting is used to convert binary to multi-state format, then data can be reorganized, but read/write performance decreases due to additional external operations
Solution Approach 1:
The patent enables the memory device to perform data rearrangement and format conversion operations autonomously using internal resources such as local data buses, processing circuits, and buffer memory. This self-service capability eliminates the need for external reformatting operations, significantly improving read/write performance by keeping data operations within the memory device itself
Solution Approach 2:
The patent moves the data reformatting operation from the external dimension (controller to memory) to the internal dimension (within memory arrays). By implementing multi-state conversion and data shuffling operations inside the memory device using local buses and processing circuits, the system eliminates external communication overhead and achieves faster operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves read/write performance, reduces errors, and increases storage capacity by allowing efficient data rearrangement and error correction within the memory device itself, without the need for external reformatting, thus addressing the limitations of conventional architectures.
Implementation Method 1
a memory cell is electrically erasable, by applying a high voltage to the substrate relative to the control gate so as to induce electrons in the floating gate to tunnel through a thin oxide to the substrate channel region (i.e., Fowler-Nordheim tunneling)
Implementation Method 2
In 'hot electron injection,' a high voltage applied to the drain accelerates electrons across the substrate channel region. At the same time a high voltage applied to the control gate pulls the hot electrons through a thin gate dielectric onto the floating gate.
Implementation Method 3
In 'tunneling injection,' a high voltage is applied to the control gate relative to the substrate. In this way, electrons are pulled from the substrate to the intervening floating gate.
Data Source
AI summary
Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the memory in a multi-state format. In the folding operation, binary data from a single word line is folded into a multi-state format and, when rewritten in multi-state form, is written into a only a portion of another word line. A corresponding reading technique, where the data is “unfolded” is also described. The techniques further allow for the data to be encoded with an error correction code (ECC) on the controller that takes into account its eventual multi-state storage prior to transferring the data to the memory to be written in binary form. A register structure allowing such a “folding” operation is also presented. One set of embodiments include a local internal data bus that allows data to between the registers of different read/write stacks, where the internal bus can used in the internal data folding process.