Non-Volatile Memory Data Integrity Protection Under Voltage Variations
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Solution Overview
Problem
Existing non-volatile memory devices fail to reliably protect data from corruption due to inaccurate high and low voltage limit detectors caused by process variations and temperature effects, leading to incorrect read/write operations when operating voltage specifications are violated.
Innovation Solution
A method that involves reading a data pattern from a non-volatile memory device, comparing the read result with a known value, and inhibiting write commands when the read result differs, ensuring the operating voltage is within specified limits by repeating the read operation multiple times to confirm integrity before processing write commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage limit detectors are used to prevent write operations outside specified voltage range, then data corruption is prevented, but process variations and temperature effects cause detector inaccuracy leading to incorrect inhibition of valid write operations
Solution Approach 1:
The patent performs preliminary read verification operations before executing write operations. A known data pattern is written to the non-volatile memory, then immediately read back and compared with the expected pattern. Only when the read result matches the expected pattern does the system proceed with the actual write operation. This preliminary verification action ensures that the memory device is functioning correctly under current voltage conditions, compensating for inaccuracies in voltage limit detectors.
Solution Approach 2:
The patent implements a feedback mechanism where the result of the read verification operation is used to control whether the write operation should proceed. The system continuously monitors the integrity of data patterns in non-volatile memory by comparing read results with expected values, and uses this feedback information to dynamically enable or disable write operations. This feedback loop ensures data integrity even when voltage conditions are marginal or detectors are inaccurate.
2Reliability
If write operations are inhibited when voltage is outside HVCC/LVCC limits, then data corruption is prevented, but process variations and temperature effects cause detectors to be inaccurate resulting in failure to process correct write commands
Solution Approach 1:
The system performs a preliminary read verification operation before inhibiting write commands. Instead of relying solely on voltage limit detectors to make the decision, the system first tests the memory device by writing and reading a known pattern. Only when this preliminary test fails does the system inhibit write operations, ensuring that write commands are not incorrectly blocked due to detector inaccuracies.
Solution Approach 2:
The memory system performs self-verification by testing its own functionality through read operations. The system uses its internal resources to write a test pattern, read it back, and compare the results. This self-service approach allows the system to autonomously determine whether write operations should be enabled or inhibited, reducing dependence on potentially inaccurate external voltage limit detectors.
3Reliability
If read verification is performed before write commands, then data corruption is prevented, but additional read operations increase processing time
Solution Approach 1:
The patent performs a focused verification operation that reads only a specific known data pattern from a specific location in the non-volatile memory, rather than performing comprehensive checks on all memory contents. This partial verification approach provides sufficient information to determine memory functionality while minimizing the time overhead. The verification is excessive in the sense that it goes beyond simple voltage checking, but is limited in scope to only the necessary test pattern.
Solution Approach 2:
The system changes the operational parameters by using a known, predetermined data pattern for verification purposes. This known pattern allows for rapid comparison and determination of memory functionality. By using a fixed, simple test pattern rather than complex verification sequences, the system minimizes the time required for the verification operation while still reliably detecting memory functionality issues.
Data Source
AI summary
A method and apparatus for protecting non-volatile memory is described. A write command is processed only when an operating voltage is between specified operating limits and when a data pattern stored in the non-volatile memory is repeatedly read successfully.