Non-Volatile Memory Initial State Verification Unit
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Solution Overview
Problem
Conventional non-volatile memory devices require substantial time and current to verify the initial state of blocks or pages, leading to compatibility issues with host systems and potential data transfer errors due to prolonged verification processes.
Innovation Solution
A method and control unit within the non-volatile memory device to quickly verify the initial state by receiving commands from a memory controller, decoding addresses, determining threshold voltages, and storing writable state information in a state register, thereby reducing verification time and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the memory controller reads the entire data of a block or page to verify the initial state, then the verification process can be performed, but the verification time becomes excessively long
Solution Approach 1:
The patent extracts only the essential verification information (threshold voltage status indicating initial state) from the entire block data, rather than reading and processing all data. The verification unit directly checks whether memory cells are in the initial state by sensing threshold voltages, extracting only the necessary state information without fetching complete data pages.
Solution Approach 2:
The patent performs a partial verification action by checking only the threshold voltage status of memory cells to determine initial state, rather than performing a complete read of all data. This partial action (checking voltage thresholds) is sufficient to verify the initial state without the excessive action of reading entire pages or blocks.
2Reliability
If the verification process is performed by reading all data in a block, then complete verification can be achieved, but current consumption increases substantially
Solution Approach 1:
The patent extracts only the essential verification information (threshold voltage status indicating initial state) from the entire block data, rather than reading and processing all data. The verification unit directly checks whether memory cells are in the initial state by sensing threshold voltages, extracting only the necessary state information without fetching complete data pages.
Solution Approach 2:
The patent performs a partial verification action by checking only the threshold voltage status of memory cells to determine initial state, rather than performing a complete read of all data. This partial action (checking voltage thresholds) is sufficient to verify the initial state without the excessive action of reading entire pages or blocks.
3Measurement precision
If the memory controller performs the verification process repeatedly for each page in a block, then thorough verification is achieved, but the total verification time increases
Solution Approach 1:
The patent implements a dedicated verification unit within the NVM device that can handle verification operations universally across all pages and blocks. This verification unit performs initial state verification as an integrated function, eliminating the need for the memory controller to repeatedly execute separate verification sequences for each page, thereby improving overall verification throughput.
Solution Approach 2:
The patent performs preliminary verification by checking the initial state of memory cells before any data operations. The verification unit determines whether memory cells are in the initial state (erased or programmed) by sensing threshold voltages in advance, allowing the system to quickly identify dirty blocks without repeatedly reading and verifying complete page data.
Data Source
AI summary
A method of verifying an initial state of a non-volatile memory device, a command for verify an initial state of a unit and a unit address corresponding to the unit received from a memory controller. An initial state of memory cells, which correspond to the unit address, is verified in response to the command. A verification result of the unit is transmitted to the memory controller.