Non-Volatile Memory Read Voltage Calibration via Selective Intervals
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Solution Overview
Problem
Conventional NAND flash memory devices require frequent calibration of read voltage thresholds, especially in newer technologies like 3D TLC or QLC, which can lead to significant overhead in terms of read operations, making it impractical for devices with a large number of blocks to maintain acceptable error rates within a reasonable time frame.
Innovation Solution
Implementing a controller that determines different calibration intervals for read voltage thresholds based on the relative probabilities of read failures due to data retention effects, allowing for selective reduction in the number of reads required for calibration, and deferring calibration for pages with low bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read voltage threshold calibration is performed frequently to maintain acceptable error rates, then reliability is improved, but productivity deteriorates due to significant overhead in read operations
Solution Approach 1:
The patent segments the memory device into multiple blocks and divides the calibration process into block-level and device-level operations. By calibrating individual blocks separately and maintaining calibration data in a lookup table, the system can update only specific blocks that need calibration rather than performing full-device calibration, thus reducing the impact on overall throughput while maintaining reliability.
Solution Approach 2:
The patent performs preliminary calibration of blocks during idle periods or low-utilization times, storing calibration results in advance. This allows the calibration work to be completed beforehand, so that during high-demand periods, the system can rely on pre-computed calibration data without sacrificing throughput.
2Reliability
If calibration is performed for all blocks to ensure acceptable error rates, then reliability is improved, but loss of time increases making it impractical for devices with large number of blocks
Solution Approach 1:
The patent applies local quality by differentiating calibration needs across different blocks. Instead of uniformly calibrating all blocks, the system identifies and calibrates only those blocks that exhibit degradation or error patterns. This selective approach reduces total calibration time while maintaining reliability where needed.
Solution Approach 2:
The patent implements partial calibration by updating only a subset of blocks that require it, rather than performing excessive full calibration on all blocks. The system monitors block health and applies calibration selectively to affected blocks, reducing overall calibration time while maintaining acceptable error rates.
3Measurement precision
If each wordline is separately calibrated with multiple reads per threshold, then measurement precision is improved, but productivity deteriorates due to large number of reads required
Solution Approach 1:
The patent merges multiple calibration reads into a single comprehensive calibration operation per block. By combining the measurement of multiple thresholds and wordlines into integrated calibration routines, the system achieves the necessary measurement precision while reducing the total number of separate read operations required.
Solution Approach 2:
The patent uses copying by creating lookup tables that store calibration results. Once calibration data is obtained through precise measurements, the results are copied and stored for reuse, eliminating the need to repeatedly perform time-consuming calibration reads for the same parameters while maintaining measurement accuracy.
Data Source
AI summary
A non-volatile memory includes a plurality of cells each individually capable of storing multiple bits of data including bits of multiple physical pages including at least a first page and a second page. A controller of the non-volatile memory determines a first calibration interval for a first read voltage threshold defining a bit value in the first page and a different second calibration interval for a second read voltage threshold defining a bit value in the second page. The second calibration interval has a shorter duration than the first calibration interval. The controller calibrates the first and second read voltage thresholds for the plurality of memory cells in the non-volatile memory based on the determined first and second calibration intervals.