Non-Volatile Memory Reading Circuit Noise Reduction

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Solution Overview

Problem

Existing non-volatile memory reading circuits experience noise on the supply voltage due to abrupt current absorption during sense amplifier activation, particularly in dual work mode operations, and lack a balance between circuit complexity and noise reduction.

Innovation Solution

A reading circuit with a sense node, sense device, precharging circuit, and timing device, where the precharging circuit is activated with a delayed signal relative to the sense device, reducing noise and average consumption by managing current peaks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the precharging circuit is activated at the same time as the sense amplifier, then the sensing operation can proceed without delay, but two current absorption peaks occur at power-up and power-down causing noise on the supply voltage

Engineering Contradiction:
Improvesensing operation speedVSAvoidsupply voltage noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The precharging circuit is activated before the sense amplifier to precharge the bit line, so that when the sense amplifier turns on, the voltage difference is already established and no large inrush current is needed. This preliminary action eliminates the first current peak while maintaining fast sensing operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The precharging circuit acts as a cushioning mechanism that prepares the bit line voltage in advance, reducing the sudden current demand when the sense amplifier activates. This beforehand cushioning prevents the harmful current peak from occurring while keeping the sensing speed high.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Object-generated harmful factors

If the precharging circuit is activated before the sense amplifier, then current absorption peaks are reduced, but the precharging circuit must remain activated during the entire sensing step increasing device complexity

Engineering Contradiction:
Improvecurrent absorption peaksVSAvoidcontrol signal timing
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The precharging circuit uses feedback from the sense amplifier output to determine when to deactivate. When the sense amplifier completes its operation and its output changes state, this signal feeds back to turn off the precharging circuit automatically, eliminating the need for complex external timing control.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The precharging circuit deactivates itself based on the sense amplifier's operation status. The sense amplifier's own output signal serves as the control signal for the precharging circuit, making the system self-regulating and reducing external control complexity.

Inventive Principle:
Principle #25Self-service

3Productivity

If multiple sense amplifiers operate simultaneously in dual work mode, then memory bandwidth is increased, but noise on the supply voltage becomes worse due to cumulative current peaks

Engineering Contradiction:
Improvememory bandwidthVSAvoidsupply voltage noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

In dual work mode, each sense amplifier pair uses precharging circuits that activate before their respective sensing operations. This preliminary action ensures that even with multiple amplifiers operating simultaneously, none of them generate large inrush current peaks, thus maintaining low supply voltage noise while achieving high memory bandwidth.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8750047B2Circuit for reading non-volatile memory cells having a precharging circuit activated after the activation of a sense circuit
Publication Date: 2014.06.10 STMICROELECTRONICS SRL
  • US8750047B2 patent drawing
  • US8750047B2 patent drawing
  • US8750047B2 patent drawing

AI summary

A circuit for reading memory cells includes: a sense node connectable to a memory cell; a sense device connected to the sense node and configured to be activated in a precharging step which precedes a cell reading step and to provide such an output signal to assume logic values dependent on an electric signal present at the sense node; a precharging circuit connected to the sense node and configured to be activated to make the sense node reach a precharging voltage and to be deactivated upon the output signal switching in the precharging step.