Non-Volatile Memory Redundancy via Data Inversion
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Solution Overview
Problem
Existing redundancy schemes for non-volatile memories require significant additional logic, increasing chip area and macro footprint, while aiming to maximize manufacturing yield by addressing defective cells in anti-fuse memory arrays.
Innovation Solution
A redundancy scheme that uses defective cells in non-volatile memories by programming them to store data, employing inversion status cells to indicate inverted logic states, allowing for transparent programming and read operations, thereby reclaiming and reusing defective cells without the need for extensive logic overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional redundancy schemes are used to address defective cells in non-volatile memory, then manufacturing yield is improved, but chip area and device complexity increase significantly
Solution Approach 1:
The patent recovers defective cells by detecting their biased logic states during normal operation and reusing them to store valid data. The system identifies defective cells through read operations and automatically corrects their contents by inverting the stored data, thereby recovering these cells from unusable to functional state without requiring spare cells or complex replacement logic
Solution Approach 2:
The redundancy mechanism operates transparently within the normal memory array structure, using the memory cells themselves to store both user data and inversion status information. The system self-corrects defective cells during standard read/write operations without external intervention or separate redundancy hardware, eliminating the need for additional logic overhead
2Reliability
If inversion status cells are added to indicate inverted logic states, then defective cells can be reclaimed and reused, but additional cells are required in the memory array
Solution Approach 1:
The inversion status cells serve dual purposes: they indicate whether data in corresponding memory cells should be inverted during read operations, and they enable the reclamation of defective cells. These same cells also function as part of the normal memory array structure, storing user data when not being used for inversion status indication, thereby maximizing utility per cell
Solution Approach 2:
Instead of adding complex correction logic or spare cells to fix defective memory cells, the patent inverts the stored data in defective cells during programming and reading operations. The inversion status cell tracks whether this inversion is needed, allowing defective cells to function correctly without physical repair or replacement
Data Source
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AI summary
A redundancy scheme for Non-Volatile Memories (NVM) is described. This redundancy scheme provides means for using defective cells in non-volatile memories to increase yield. The algorithm is based on inverting the program data for data being programmed to a cell grouping when a defective cell is detected in the cell grouping. Defective cells are biased to either "1" or "0" logic states, which are effectively preset to store its biased logic state. A data bit to be stored in a defective cell having a logic state that is complementary to the biased logic state of the cell results in the program data being inverted and programmed. An inversion status bit is programmed to indicate the inverted status of the programmed data. During read out, the inversion status bit causes the stored data to be re-inverted into its original program data states.