Non-volatile Memory Resistor Body Fabrication
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Solution Overview
Problem
In non-volatile memory devices, the resistance of voltage dividing resistor bodies formed near the substrate changes significantly due to impurity doping and thermal processes, complicating the fabrication of three-dimensional memory devices with high integration and increased area usage.
Innovation Solution
A method where a conductive layer, formed simultaneously with the gate electrode of a selection transistor, functions as a resistor body in the peripheral circuit region, reducing resistance variation and area occupancy by stacking memory cells vertically and integrating peripheral circuits more effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a voltage dividing resistor body is formed near the substrate together with lower structure elements, then the fabrication process is simplified, but the resistance of the voltage dividing resistor body changes greatly due to impurity doping concentration changes
Solution Approach 1:
The patent moves the voltage dividing resistor body from the lower layer near the substrate to the upper layer where the selection transistor gate electrode is formed. This vertical relocation to another dimension (upper layer) allows the resistor body to be formed simultaneously with the gate electrode without undergoing subsequent thermal processes that would alter its resistance, thus resolving the contradiction between fabrication simplicity and resistance stability.
2Ease of manufacture
If memory cells are formed in a single layer over the substrate, then the fabrication process is simpler, but the integration density is limited
Solution Approach 1:
The patent transitions from a two-dimensional single-layer memory cell structure to a three-dimensional stacked structure where multiple memory cells are vertically stacked in the upper layer. This dimensional change enables higher integration density while maintaining fabrication simplicity by forming all memory cells simultaneously in the same process step.
3Manufacturing precision
If the voltage dividing resistor body is formed in the peripheral circuit region separately, then the resistance stability is maintained, but the device area increases
Solution Approach 1:
The patent merges the formation of the voltage dividing resistor body with the formation of the selection transistor gate electrode in the peripheral circuit region. Both structures are formed simultaneously using the same conductive layer and processing steps, eliminating the need for separate resistor body formation processes and reducing the overall device area while maintaining resistance stability.
Data Source
AI summary
A method for fabricating a non-volatile memory device includes: providing a substrate which includes a cell region where a plurality of memory cells are to be formed and a peripheral circuit region where a plurality of peripheral circuit devices are to be formed; forming the memory cells that are stacked perpendicularly to the substrate of the cell region; and forming a first conductive layer for forming a gate electrode of a selection transistor over the memory cells while forming the first conductive layer in the peripheral circuit region simultaneously, wherein the first conductive layer of the peripheral circuit region functions as a resistor body of at least one peripheral circuit device of the peripheral circuit devices.