Non-Volatile Memory Row Redundancy via Volatile Buffer
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Solution Overview
Problem
Non-volatile memory systems face defects due to short-circuits during erase operations, leading to defective rows that can affect memory functionality, and existing row redundancy mechanisms may impact access times and operational efficiency.
Innovation Solution
An automatic row redundancy mechanism that stores the address of defective rows in a non-volatile register and assigns a redundant row, with data loaded into a volatile memory buffer for faster access, allowing continuous reloading of the redundant row's content except during write operations, enabling efficient handling of defective rows without affecting other memory rows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a row redundancy mechanism is implemented to replace defective rows, then reliability is improved, but access time may be increased due to additional management overhead
Solution Approach 1:
The patent pre-loads redundant row data into a volatile buffer memory before it is needed. When a defective row is detected, its data is already available in the buffer, eliminating the need to read from the non-volatile memory during the actual access operation. This preliminary preparation of data in faster memory resolves the contradiction by maintaining fast access times while ensuring reliability through redundancy.
Solution Approach 2:
The patent introduces a volatile buffer memory as an intermediary between the non-volatile memory and the data output. This buffer acts as a mediator that holds redundant row data, allowing fast access without directly querying the slower non-volatile memory. The buffer memory serves as the intermediary that resolves the speed-reliability contradiction by providing fast data delivery while the underlying non-volatile memory maintains the actual stored data.
2Speed
If redundant row data is continuously loaded into volatile memory buffer, then access speed is improved, but energy consumption increases due to continuous reloading operations
Solution Approach 1:
Instead of continuously reloading redundant row data into the volatile buffer, the patent implements periodic reloading only when necessary. The buffer is refreshed based on usage patterns or time intervals, rather than maintaining constant continuous operation. This periodic approach maintains fast access capability while significantly reducing energy consumption compared to uninterrupted continuous loading.
Solution Approach 2:
The system monitors its own buffer status and autonomously decides when reloading is necessary, rather than relying on continuous external control signals. The volatile buffer manages its own content refresh based on detection of actual access needs, eliminating wasteful energy-consuming reload operations that would occur in a continuously controlled system.
3Loss of time
If the volatile memory buffer is used to store redundant row data, then access time is reduced, but device complexity increases due to additional memory management mechanisms
Solution Approach 1:
The volatile buffer memory is designed to serve multiple functions: it stores both regular operational data and redundant row data, and can be dynamically allocated for different purposes based on system needs. This multi-functionality reduces the need for separate dedicated structures for redundancy management, thereby reducing overall device complexity while maintaining fast access capabilities.
Solution Approach 2:
The patent merges the redundant data storage function with the existing volatile buffer memory structure, rather than creating a separate redundant storage system. By combining these functions in a single memory structure, the patent reduces the number of separate components and management mechanisms needed, thereby reducing device complexity while still achieving fast access to redundant data when needed.
Data Source
AI summary
A non-volatile memory is erasable by page and equipped with a row redundancy mechanism. In the case of the detection of a defective row of the memory plane, the storing of the address of the row in a non-volatile register is carried out and a redundant row having a new address is assigned. In the case of an attempt to write to the defective row, a write to the redundant row is carried out. When writing to the redundant row, the new content of the redundant row is loaded into a volatile memory and, following an operation for writing to any other row of the memory plane, a re-loading of the new content of the redundant row into the volatile memory.