NVM Integration Seal Layer for Logic and BCD Oxidation Protection
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Solution Overview
Problem
The integration of non-volatile memory (NVM) devices with logic or bipolar complementary metal-oxide-semiconductor (CMOS) double-diffused metal-oxide-semiconductor (DMOS) devices in integrated circuits (ICs) faces challenges due to thermal and oxidation processes that can oxidize and consume the logic and BCD regions, altering their doping profiles and performance.
Innovation Solution
A seal layer, such as silicon nitride or polysilicon, is used to protect the peripheral regions from thermal and oxidation processes during the formation of the memory structure, preventing oxidant migration and maintaining the doping profiles of the logic and BCD devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If thermal and oxidation processes are applied to form memory structure, then memory device formation is achieved, but logic and BCD regions are oxidized and consumed altering their doping profiles
Solution Approach 1:
The patent divides the semiconductor substrate into distinct memory region and peripheral region (logic/BCD), applying different processing approaches to each region to resolve the contradiction between memory formation and device protection
Solution Approach 2:
A seal layer is introduced as an intermediary protective barrier between the oxidizing environment and the logic/BCD regions, allowing thermal processes to proceed while preventing oxidant migration to sensitive areas
2Productivity
If oxidants are introduced during thermal processes, then memory structure is formed, but doping profiles of logic and BCD regions are altered
Solution Approach 1:
The seal layer acts as a protective intermediary that blocks oxidant diffusion paths, preserving the precise doping profiles of logic and BCD regions while enabling necessary thermal processing for memory formation
Solution Approach 2:
The seal layer is selectively applied to protect specific regions (logic and BCD) while allowing oxidation to proceed in the memory region, creating locally differentiated processing conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures high yields and stable performance of the ICs by preventing oxidation of the logic and BCD regions, maintaining their doping profiles and reducing shifts in performance parameters.
Implementation Method 1
thermal and oxidation processes that can oxidize and consume the logic and BCD regions
Implementation Method 2
A seal layer, such as silicon nitride or polysilicon, is used to protect the peripheral regions from thermal and oxidation processes during the formation of the memory structure, preventing oxidant migration
Data Source
AI summary
Various embodiments of the present application are directed towards a method to integrate NVM devices with a logic or BCD device. In some embodiments, an isolation structure is formed in a semiconductor substrate. The isolation structure demarcates a memory region of the semiconductor substrate, and further demarcates a peripheral region of the semiconductor substrate. The peripheral region may, for example, correspond to BCD device or a logic device. A doped well is formed in the peripheral region. A dielectric seal layer is formed covering the memory and peripheral regions, and further covering the doped well. The dielectric seal layer is removed from the memory region, but not the peripheral region. A memory cell structure is formed on the memory region using a thermal oxidation process. The dielectric seal layer is removed from the peripheral region, and a peripheral device structure including a gate electrode is formed on the peripheral region.