Non-volatile Memory Programming via Segmented Bit Line Groups
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing non-volatile memory devices face challenges in efficiently programming memory cells due to the complexity of addressing and selecting string selection lines and bit line groups, leading to program disturbances and inefficiencies in data storage operations.
Innovation Solution
A method is introduced that involves sequentially programming memory cells connected to string selection lines and bit line groups by converting addresses to prioritize string selection line addresses over bit line group addresses, allowing for controlled application of programming voltages to minimize program disturbances and optimize data storage efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional addressing methods are used to select string selection lines and bit line groups, then memory cells can be programmed, but program disturbances occur and data storage efficiency decreases
Solution Approach 1:
The memory device divides bit lines into multiple bit line groups (first bit line group and second bit line group), each associated with different string selection lines. This segmentation allows selective programming of specific memory cell groups while isolating others, thereby reducing program disturbances to unselected cells while maintaining efficient data storage operations.
2Speed
If multiple string selection lines are selected simultaneously for programming, then programming speed increases, but program disturbances increase
Solution Approach 1:
The patent applies different voltage conditions to different string selection lines and bit line groups based on local requirements. Selected string selection lines receive programming voltages while unselected ones receive different voltages, and similarly for bit line groups. This localized voltage control enables parallel programming of multiple strings while minimizing program disturbances to unselected memory cells.
3Reliability
If sequential programming of all memory cells is performed, then program disturbances are minimized, but programming time increases
Solution Approach 1:
The patent employs periodic action by dividing the programming process into multiple phases, where different string selection lines and bit line groups are activated in sequence. First memory cells connected to the first bit line group are programmed, then second memory cells connected to the second bit line group are programmed. This periodic activation pattern reduces program disturbances while maintaining efficient programming speed through parallel processing of different cell groups.
Data Source
AI summary
Methods of programming a non-volatile memory device including N string selection lines, a word line, first and second bit line groups are provided. The method may include sequentially programming first memory cells that are connected to the word line and at least one bit line included in the first bit line group by sequentially selecting the N string selection lines in response to sequentially applied first to N-th addresses, and then sequentially programming second memory cells that are connected to the word line and at least one bit line included in the second bit line group by sequentially selecting one of the N string selection lines in response to sequentially applied N+1-th to 2N-th addresses.