Non-volatile Memory Programming via Stepwise Voltage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Non-volatile memory devices face challenges in reducing the time required for programming memory cells, which affects operation performance.

Innovation Solution

A method involving stepwise changes in program word line voltage and bit line voltage levels to selectively program memory cells, with specific voltage levels applied during different time intervals to optimize programming efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If various types of program voltages are applied to word line and bit line for programming memory cell, then programming function is achieved, but programming time is increased

Engineering Contradiction:
Improveprogramming functionVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the programming operation into multiple voltage levels applied at different time intervals. The word line voltage is segmented into first, second, and third voltage levels applied sequentially, while the bit line voltage is segmented into program inhibit level and program voltage level. This temporal and voltage-level segmentation enables efficient programming while reducing overall programming time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts voltage levels based on programming progress and cell state. The word line voltage transitions from first voltage level to second voltage level to third voltage level at different time intervals, and the bit line voltage switches between inhibit and program levels dynamically. This dynamic voltage control optimizes programming speed while ensuring reliable programming function.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If program bit line voltage is applied to inhibit first memory cells from programming, then selective programming is achieved, but programming time increases due to additional voltage control steps

Engineering Contradiction:
Improveselective programmingVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies different voltage levels to different bit lines simultaneously. The program bit line voltage is applied to specific bit lines to inhibit programming of first memory cells, while other bit lines receive different voltage levels to enable programming. This local differentiation achieves selective programming without significant time penalty.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses periodic voltage pulses with different levels to achieve selective programming. The word line voltage is applied periodically with different voltage levels at different time intervals, and the bit line voltage switches periodically between inhibit and program levels. This periodic action enables precise control of which memory cells are programmed while maintaining efficient timing.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11322205B2Non-volatile memory device and method for programming the same
Publication Date: 2022.05.03 SAMSUNG ELECTRONICS CO LTD
  • US11322205B2 patent drawing
  • US11322205B2 patent drawing
  • US11322205B2 patent drawing

AI summary

A method for programming a non-volatile memory device is provided. The method comprises applying a program word line voltage with a voltage level changed stepwise to a selected word line connected to a plurality of memory cells, and applying a program bit line voltage to a first bit line of a plurality of bit lines connected to a plurality of first memory cells, while the program word line voltage is applied to the selected word line. The program bit line voltage transitions from a first voltage level to one of a program inhibit voltage level, a program voltage level, and a second voltage level. The first and second voltage levels are between the program inhibit voltage level and program voltage level.