Non-Volatile Memory Switch Host Isolation Logic
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Solution Overview
Problem
In high-performance computing environments using non-volatile memory (NVM), existing technologies face challenges in managing multiple hosts accessing a single port NVM device, where issues with one host can delay or block transactions for other hosts, and effective error reporting and isolation are not adequately addressed.
Innovation Solution
A NVM switch with logic and program code facilitates multi-host to single port host isolation by clearing in-flight commands and flushing data of error hosts, ensuring proper error reporting and communication, using transaction management logic to route packets and isolate errors, and employing host identifier logic to maintain communication coherency across multiple hosts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple hosts access a single port NVM device simultaneously, then productivity and resource utilization are improved, but reliability deteriorates because issues with one host can delay or block transactions for other hosts
Solution Approach 1:
The patent segments the shared NVM access path by implementing per-host isolation mechanisms within the switch. Each host's transactions are separated into distinct processing channels, allowing one host's issues to be contained without blocking other hosts. The switch maintains separate command queues, completion queues, and state machines for each host, enabling independent transaction processing while sharing the physical NVM device.
Solution Approach 2:
The NVM switch acts as an intermediary between multiple hosts and the single-port NVM device. It implements intelligence to detect when a host encounters an issue and actively isolates that host's transactions from the shared access path. The switch monitors host status, detects errors, and dynamically routes or blocks transactions to prevent error propagation, thereby protecting the overall system reliability while maintaining multi-host productivity.
2Measurement precision
If a host encounters an error during NVM access, then error detection capability is improved, but productivity deteriorates because the error blocks transactions for other hosts
Solution Approach 1:
The patent extracts the problematic host's transactions from the shared access path upon error detection. The switch identifies the erroneous host and removes its transactions from the common queue, isolating the error source. This allows the switch to maintain precise error detection for the affected host while preventing the error from blocking transactions from other healthy hosts, thereby preserving overall productivity.
3Reliability
If the NVM switch implements comprehensive error isolation and host identification logic, then reliability is improved, but device complexity increases
Solution Approach 1:
The NVM switch implements multi-functional logic that handles multiple tasks within unified components. The same switch fabric and control logic that route normal transactions also perform error detection and isolation functions. Host identification is integrated into the existing address translation and routing mechanisms, rather than requiring separate dedicated hardware. This universal approach achieves comprehensive error isolation while minimizing the increase in device complexity.
Data Source
AI summary
In a system with multiple host computers and one or more single-port non-volatile memory devices, a non-volatile memory switch receives memory transaction messages from different root complexes corresponding to the multiple host computers. Each of at least some of the memory transaction messages includes a host identifier that identifies a root complex from which the memory transaction was received. The non-volatile memory switch generates modified memory transaction messages at least by changing host identifiers within memory transaction messages to a common value indicative of a single root complex to present to the one or more single-port non-volatile memory devices the different root complexes as the single root complex. The non-volatile memory switch maintains associations of memory transaction messages with corresponding ones of the different root complexes, and sends the modified memory transaction messages to the one or more single-port non-volatile memory devices.