Non-Volatile Memory Programming Method With ECC Decoding

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Solution Overview

Problem

Non-volatile memories, such as EEPROM and flash memory, face issues with incorrect data transmission, memory space wastage, and limited erasing times, particularly in programming bit signals, which necessitate an effective error correction mechanism to prevent bit errors and optimize memory usage.

Innovation Solution

A programming method for non-volatile memory that involves decoding sequential bits of data into error-corrected data, where each data page includes additional error correction code (ECC) bits, ensuring that any two different data sets have a specific variance, thereby preventing bit errors and reducing the need for new memory pages during data updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction code (ECC) is introduced into the programming method, then bit errors of storage memories are prevented, but the utilization ratio of new pages to program updated data decreases and memory spaces are saved

Engineering Contradiction:
Improvebit error preventionVSAvoidmemory space utilization
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent applies preliminary action by pre-calculating and pre-arranging error correction codes during the programming process. The ECC bits are integrated into the data structure before storage, allowing error detection and correction to be prepared in advance. This ensures that when data is read back, the errors can be immediately corrected without requiring additional processing time or space, thus preventing bit errors while optimizing memory utilization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of data structure by introducing ECC bits as an additional component. The data is transformed from a simple bit sequence to a structured format including parity bits or checksums. This parameter change enables the system to detect and correct errors without requiring a complete rewrite of the data, thereby improving reliability while maintaining efficient memory space utilization through optimized encoding schemes.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If data is programmed unidirectionally with ECC, then data integrity is improved, but the complexity of the programming process increases

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the data into distinct segments: data bits and error correction bits. This segmentation allows the programming process to handle errors systematically by processing only the affected segments rather than the entire data structure. The decoding module can independently identify and correct errors in specific segments, reducing the overall complexity of error correction while maintaining data integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary decoding module that acts as a mediator between the programming process and error correction. This intermediary component simplifies the overall system by centralizing the error detection and correction logic, making the programming process more manageable. The decoding module serves as a bridge that translates complex error correction requirements into straightforward programming operations, thereby reducing perceived complexity while ensuring data integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7987316B2Programming device for non-volatile memory and programming method thereof
Publication Date: 2011.07.26 PHISON ELECTRONICS
  • US7987316B2 patent drawing
  • US7987316B2 patent drawing
  • US7987316B2 patent drawing

AI summary

The invention presents a programming method for a non-volatile memory with a bit signal to be programmed unidirectionally. The method includes the steps of a) providing first data each having a first number of sequential bits of first status in a data page in a non-volatile memory, b) decoding the first number of sequential bits of the first status in the first data into a second number of sequential bits of second status, and c) programming second data in a portion of the data page where the first status has been decoded to the second status.