On-Die Termination Circuit Layout for High-Frequency Impedance Control
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Solution Overview
Problem
Conventional On Die Termination (ODT) circuits in semiconductor memory devices face issues with increased parasitic capacitance, impedance linearity deterioration, and slow switching times, particularly when handling high-frequency signals, which affect signal integrity and reflection.
Innovation Solution
The proposed ODT circuit incorporates a switch unit and driver configurations that utilize transistors functioning as inductors to manage parasitic capacitance and impedance, with a resistor and additional capacitors to maintain constant impedance and enable quick switching, using control signals to control the ODT operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional ODT circuits use PMOS transistors for termination, then the circuit can be implemented with simple structure, but parasitic capacitance increases and high frequency performance deteriorates
Solution Approach 1:
The ODT circuit is segmented into multiple independent termination paths: a first termination path with a first PMOS transistor and first termination resistor, and a second termination path with a second PMOS transistor and second termination resistor. Each path handles specific voltage conditions independently, reducing the parasitic capacitance impact on any single path while maintaining overall signal integrity.
Solution Approach 2:
The circuit dynamically switches between different termination configurations based on voltage conditions. When the first voltage is higher than the second voltage, the first termination path is activated; when the second voltage is higher, the second termination path is activated. This dynamic switching optimizes performance across different operating conditions and frequency ranges.
2Reliability
If ODT circuit uses single termination resistor, then impedance matching is achieved, but impedance linearity deteriorates at high frequencies due to parasitic capacitance
Solution Approach 1:
The single termination resistor is segmented into multiple termination resistors (first termination resistor and second termination resistor) operating in different voltage conditions. Each resistor maintains impedance matching for its specific operating range, and their combined operation across different conditions maintains overall impedance linearity that a single resistor cannot achieve alone.
3Ease of operation
If ODT circuit uses conventional switching mechanism, then the circuit can be controlled, but switching speed is slow and cannot keep up with high frequency operations
Solution Approach 1:
The circuit employs dynamic voltage-based control where termination paths are automatically activated or deactivated based on real-time voltage comparisons. The control mechanism responds to voltage differential conditions (first voltage higher than second voltage, or vice versa) rather than relying on slow external control signals, enabling switching speeds that keep up with high frequency operations.
4Reliability
If ODT circuit is designed for high frequency operation, then signal integrity improves, but parasitic capacitance effects become more significant and cause signal attenuation
Solution Approach 1:
The termination function is segmented across multiple parallel paths with different PMOS transistors and termination resistors. By distributing the termination function across multiple paths that operate under different voltage conditions, the parasitic capacitance of any single path becomes less significant, and the overall circuit maintains better signal integrity at high frequencies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces parasitic capacitance effects, maintains constant impedance at higher frequencies, and enables faster switching, thereby improving signal integrity and reducing signal reflection compared to conventional techniques.
Implementation Method 1
the value of additional capacitance should be small. If the values of a junction capacitance or a parasitic capacitance are large, when a high frequency signal is input to the ODT circuit, the termination function of the ODT circuit deteriorates and signal attenuation becomes significant.
Implementation Method 2
the resistance of the termination resistor is set to match the impedance of transmission lines
Implementation Method 3
Signal reflection has a negative influence on signal integrity. In order to suppress such signal reflection, lines for transmitting signals between a system and a memory can be terminated by a termination resistor.
Data Source
AI summary
An On Die Termination (ODT) circuit for performing an ODT operation. The ODT circuit includes a resistor having a first end to receive an ODT enable signal; and a switch unit coupled to a second end of the resistor. The ODT operation is performed in response to the ODT enable signal passing through the resistor.