Offset Cell Geometries for Memory Array Area Reduction
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Solution Overview
Problem
Design rule conflicts across cell borders in integrated circuit memory arrays can disrupt symmetry, preventing the use of conventional cell placement software and increasing the area of cell and array patterns.
Innovation Solution
The method involves moving adjacent similar structures in opposite directions parallel to the cell border to resolve design rule violations while preserving symmetry, allowing non-identical cells to form a unit pair with mirror image symmetry, enabling their placement using conventional software.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional cell placement software is used to place identical cells in memory arrays, then placement efficiency is improved, but design rule conflicts across cell borders occur that disrupt symmetry
Solution Approach 1:
The patent applies asymmetry by intentionally creating non-identical offset cells that differ from conventional identical cells. The offset cells have shifted geometries that deliberately break the symmetry of traditional memory array cells, allowing design rules to be satisfied across cell borders while maintaining overall array functionality
Solution Approach 2:
The patent applies local quality by introducing offset configurations specifically at cell borders where design rule conflicts occur. The offset cells maintain standard configurations in regions where design rules are not problematic, while applying offset geometries only where needed to resolve border conflicts
2Reliability
If design rule conflicts are resolved by modifying cell geometries, then design rule compliance is improved, but the area of cell and array patterns increases
Solution Approach 1:
The patent applies partial action by implementing offset configurations only in specific regions where design rule conflicts occur, rather than uniformly across the entire array. This selective application of offset geometries resolves design rule violations without unnecessarily increasing the area of the entire memory array
3Ease of manufacture
If identical cells are used in memory arrays, then manufacturing simplicity is improved, but design rule conflicts across cell borders cannot be resolved
Solution Approach 1:
The patent applies segmentation by dividing the memory array into different cell types: standard identical cells and offset cells. This segmentation allows the majority of cells to remain simple and identical for easy manufacturing, while offset cells are strategically placed only where needed to resolve design rule conflicts
Data Source
AI summary
An array with cells that have adjacent similar structures that are displaced from each other across a common cell border in a direction that is not perpendicular to the cell border thus avoiding an across cell border design rule violation between the adjacent similar structures. A method of forming reduced area memory arrays by moving adjacent similar structures that is not perpendicular to a fully identical common cell border. A method of building arrays using conventional array building software by forming unit pairs with cells that are not identical and are not mirror images or rotated versions of each other.