Offset-Compensated Data Sampling Circuit for Lower Kickback Noise
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Solution Overview
Problem
In LPDDR4/5 memory technologies, the DQ data sampling circuit faces significant kickback noise issues due to the sampling module, which is exacerbated by the offset compensation circuit, making it difficult to maintain high operating speeds as input signal rates increase.
Innovation Solution
A data sampling circuit design incorporating multiple sampling and latch modules, along with parallel offset compensation modules, utilizing P-type and N-type transistors to manage signal nodes and output terminals, and a reset module to control clock signals, thereby reducing kickback noise and enabling higher speed operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the sampling module operates at higher speeds to match increasing input signal rates, then the operating speed of the DQ data sampling circuit is improved, but kickback noise generated by the sampling module increases significantly
Solution Approach 1:
The patent divides the sampling circuit into multiple sampling modules (first sampling module and second sampling module) that operate in a segmented manner. Each module handles specific sampling tasks, distributing the operational load and reducing the kickback noise generated by any single module operating at high speed alone.
Solution Approach 2:
The patent introduces an offset compensation module as an intermediary component between the sampling modules and the output. This module compensates for offset voltages and helps mitigate kickback noise by acting as a buffer that stabilizes the signal path without requiring the main sampling modules to operate at reduced speeds.
2Measurement precision
If an offset compensation circuit is added to compensate for sampling module offset voltage, then sampling accuracy is improved, but kickback noise is further increased
Solution Approach 1:
The patent applies offset compensation locally to specific sampling modules rather than using a global compensation approach. The offset compensation module is selectively connected to compensate only the offset voltage of specific sampling modules, providing precise local correction while minimizing the overall kickback noise impact on the entire circuit.
Solution Approach 2:
The patent implements dynamic offset compensation where the compensation is actively adjusted based on the operational state of the sampling modules. The offset compensation module dynamically responds to offset voltage changes during operation, maintaining sampling accuracy while adapting to varying noise conditions without requiring fixed high-speed operation that would increase kickback noise.
3Object-generated harmful factors
If multiple sampling modules are used to reduce kickback noise, then noise reduction is achieved, but device complexity increases
Solution Approach 1:
The patent merges multiple sampling modules and the offset compensation module into an integrated data sampling circuit architecture. By combining these components into a unified structure with shared control signals and coordinated operation, the patent reduces the overall complexity that would otherwise result from having separate, independent modules while still achieving kickback noise reduction through the multi-module approach.
Data Source
AI summary
Various embodiments provide a data sampling circuit comprising a first sampling module configured to respond to a signal from the data signal terminal and a signal from the reference signal terminal and to act on the first node and the second node; a second sampling module configured to respond to the signal from the first node and the signal from the second node and to act on the third node and the fourth node; a latch module configured to input a high level to the first output terminal and input a low level to the second output terminal; and an offset compensation module connected in parallel to the second sampling module and configured to compensate an offset voltage of the second sampling module.