Vertically Offset Electrodes in Semiconductor Light Emitting Devices
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Solution Overview
Problem
Current semiconductor light emitting devices face challenges in achieving efficient light emission and electrical characteristics due to limitations in their structural design and electrode configurations, which affect their performance in display applications.
Innovation Solution
A semiconductor light emitting device with a rod-shaped structure featuring vertically offset electrode regions and a specific configuration of conductivity-type semiconductor layers and active layers, along with a passivation layer, is developed. This design includes a first conductivity-type semiconductor with a protruding structure and a second conductivity-type semiconductor, enabling improved separation and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional planar electrode configuration is used, then manufacturing is simple, but light emission efficiency and electrical characteristics are insufficient
Solution Approach 1:
The patent transitions from a conventional planar electrode configuration to a three-dimensional vertically offset electrode structure. The first electrode is positioned at a first vertical level while the second electrode is positioned at a second vertical level, creating a stepped configuration that improves light extraction efficiency and electrical contact while maintaining manufacturability through standard semiconductor fabrication processes.
2Reliability
If vertically offset electrode regions are implemented, then light emission efficiency improves, but device complexity increases
Solution Approach 1:
The device is segmented into distinct vertical regions with the first electrode layer positioned at a first vertical level and the second electrode layer positioned at a second vertical level. This segmentation allows each electrode to be optimized for its specific function while maintaining a relatively simple overall structure that can be fabricated using standard semiconductor manufacturing techniques.
3Reliability
If protruding structure is added to semiconductor layer, then electrical connectivity and contact resistance improve, but manufacturing precision requirements increase
Solution Approach 1:
The protruding structure is formed on the first conductivity-type semiconductor layer before subsequent processing steps. This preliminary formation of the protruding structure ensures proper electrical contact and connectivity is established early in the fabrication process, allowing subsequent layers to be aligned relative to this pre-formed feature, thereby managing precision requirements systematically.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design enhances light emission efficiency and electrical characteristics, facilitating better contact resistance and uniformity in display applications, particularly in pixel structures of display apparatuses.
Implementation Method 1
Semiconductor light emitting diodes (LEDs) are not only used as light sources for lighting devices but also as light sources for various electronic products
Implementation Method 2
a first electrode layer on a first region of the first surface of the light emitting structure and connected to the first conductivity-type semiconductor, the first region having a level that is vertically offset from a level of a second region adjacent thereto
Data Source
AI summary
A semiconductor light emitting device includes a light emitting structure having a rod shape with first and second surfaces opposing each other and a side surface connected between the first and second surfaces, and including a first conductivity-type semiconductor providing the first surface, an active layer and a second conductivity-type semiconductor, a first electrode layer on a first region of the first surface of the light emitting structure and connected to the first conductivity-type semiconductor, the first region having a level that is vertically offset from a level of a second region adjacent thereto, and a second electrode layer connected to the second conductivity-type semiconductor.