Offset Heat Spreaders for Hybrid Circuit Thermal Management
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Solution Overview
Problem
Conventional circuit devices face challenges in miniaturization due to thermal interference between semiconductor elements, which can lead to overheating, and spacing them apart to avoid this issue compromises device size reduction.
Innovation Solution
The use of heat spreaders on a circuit device, where semiconductor elements are mounted offset from each other on the heat spreaders' surfaces, allowing for maximum spacing and effective heat dissipation while maintaining miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple power transistors are arranged in a small region for miniaturization, then device size is reduced, but thermal interference between transistors increases causing higher junction temperatures
Solution Approach 1:
The patent applies offset arrangement in the planar dimension to space heat spreaders apart, preventing thermal interference while maintaining compact device footprint. The heat spreaders are positioned at different locations in the plane rather than being stacked vertically or placed directly adjacent, effectively using spatial dimensionality to resolve the thermal conflict.
Solution Approach 2:
The patent introduces heat spreaders as intermediary thermal management components between the power transistors and the substrate. These heat spreaders conduct heat away from the transistor junctions, acting as thermal mediators that prevent direct thermal coupling between adjacent transistors while enabling closer packaging.
2Temperature
If transistors are spaced apart to avoid thermal interference, then junction temperature is reduced, but device size cannot be miniaturized
Solution Approach 1:
The patent uses offset positioning of heat spreaders in the planar dimension to achieve thermal separation without requiring large spacing between transistors. This dimensional approach allows transistors to be packaged more densely while maintaining adequate thermal separation through the offset heat spreader arrangement.
Solution Approach 2:
Heat spreaders serve as thermal intermediary components that enable compact transistor spacing while preventing thermal interference. By positioning these thermal mediators offset from each other, the patent achieves both miniaturization and thermal management simultaneously.
3Volume of moving object
If heat spreaders are arranged close to each other for miniaturization, then device size is reduced, but thermal interference between heat spreaders may increase
Solution Approach 1:
The patent employs asymmetric offset positioning of heat spreaders relative to each other, rather than symmetric arrangement. This asymmetric configuration creates non-uniform thermal pathways that reduce thermal coupling between adjacent heat spreaders, allowing them to be placed closer together without significant thermal interference.
Solution Approach 2:
By offsetting heat spreaders in the planar dimension rather than arranging them in direct alignment, the patent reduces thermal interference while maintaining compact size. This dimensional offsetting creates greater effective spacing between thermal sources without increasing overall device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses thermal interference and overheating, allowing for the miniaturization of the circuit device without compromising heat dissipation or increasing the overall size.
Implementation Method 1
a first heat spreader arranged on an upper surface of the circuit substrate; a first semiconductor element fixed to an upper surface of the first heat spreader; a second heat spreader arranged, close to the first heat spreader, on the upper surface of the circuit substrate; and a second semiconductor element fixed to an upper surface of the second heat spreader
Data Source
AI summary
Provided is a circuit device having a configuration in which thermal interference between built-in elements is suppressed and being miniaturized in total size. A hybrid integrated circuit device of the present invention includes: a circuit substrate, a sealing resin and leads. The circuit substrate in its upper surface is incorporated with a hybrid integrated circuit formed of semiconductor elements and the like respectively fixed to heat spreaders. The sealing resin coats the circuit substrate and thus seals the hybrid integrated circuit. The leads each extend to the outside while being fixed to a pad formed of a conductive pattern. In this hybrid integrated circuit device, the semiconductor elements are mounted on the respective heat spreaders at positions offset from each other, and thereby are arranged to be spaced away from each other.