Offset Interposer IC Package for Testing Yield
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Solution Overview
Problem
Current multi-chip packages face challenges in increased integrated circuit density, assembly process yield, and manufacturing costs due to difficulties in testing individual integrated circuits and reliable mechanical and electrical attachments, with encapsulation processes often leading to contamination and assembly defects.
Innovation Solution
The integrated circuit package system employs an interposer with bond and contact pads mounted in an offset location over a carrier, with electrical interconnects and an anti-flash structure to prevent encapsulation coverage of contact pads, allowing for flexible packaging and reduced contamination risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-chip packages are pre-assembled before testing, then integrated circuit density increases, but assembly process yield decreases due to inability to test individual circuits
Solution Approach 1:
The patent divides the multi-chip package into modular units, each containing an interposer with its own contact pads and bonding structure. This segmentation allows individual testing of each module before final assembly, resolving the contradiction between high density and testability.
Solution Approach 2:
The interposer is prepared in advance with exposed contact pads and bonding structures before chip assembly. This preliminary preparation enables pre-assembly testing of the interposer itself, allowing defect identification before final chip mounting, thus improving yield while maintaining density.
2Device complexity
If encapsulation is formed over contact pads, then package structure is simplified, but contamination and assembly defects increase
Solution Approach 1:
The patent applies different properties to different regions: the encapsulation material is formulated to be non-contaminating, and the bonding structure is designed with specific surface properties that prevent flash adhesion. This local quality control allows encapsulation to cover contact pads without causing contamination or defects.
Solution Approach 2:
The patent uses a sacrificial release layer that is intentionally designed to be temporary and easily removable. This disposable layer protects contact pads during encapsulation and is then discarded, allowing complete encapsulation coverage without permanent contamination or complex protective structures.
3Area of stationary object
If vertically stacked integrated circuits are assembled, then real estate utilization improves, but testing and failure mode identification become more difficult
Solution Approach 1:
The interposer serves as an intermediary layer between vertically stacked chips, providing exposed contact pads and bonding structures that enable testing access. This mediator allows test signals to reach individual chips in the stack without requiring disassembly, resolving the contradiction between vertical stacking and testability.
Data Source
AI summary
An integrated circuit package system includes: providing an interposer having a bond pad and a contact pad; mounting the interposer in an offset location over a carrier with an exposed side of the interposer coplanar with an edge of the carrier; connecting an electrical interconnect between bond pad and the carrier; and forming a package encapsulation over the carrier and the electrical interconnect with both the contact pad and the exposed side of the interposer not covered.