Offset Interposers for Large-Bottom Packages
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Solution Overview
Problem
Existing package-on-package (POP) interposer designs face challenges in efficiently interfacing logic devices and memory devices during packaging, particularly in maintaining alignment and spacing to accommodate different pad sizes and configurations.
Innovation Solution
The use of offset interposers with translated pad configurations, where POP-side pads are offset in the X-direction relative to land-side pads, allowing for direct contact via vias and reduced trace lengths, thereby aligning with conventional pad spacings and accommodating various device sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional POP interposer designs are used with aligned pad configurations, then manufacturing and assembly are simpler, but alignment and spacing challenges arise when accommodating different pad sizes and configurations between logic devices and memory devices
Solution Approach 1:
The interposer employs an asymmetric pad configuration where POP-side pads are offset in the X-direction relative to land-side pads. This asymmetric arrangement allows the interposer to accommodate different pad sizes and configurations between logic devices and memory devices, resolving the contradiction between adaptability and complexity by deliberately introducing controlled asymmetry to match the asymmetric requirements of different devices.
Solution Approach 2:
Different regions of the interposer have different pad configurations tailored to specific device requirements. The land-side pads are configured to match logic device specifications while POP-side pads are offset and configured for memory device specifications. This local differentiation allows each region of the interposer to be optimized for its specific function, enabling accommodation of diverse pad configurations without requiring a completely complex redesign of the entire interposer structure.
2Adaptability or versatility
If offset interposer design is implemented to accommodate different device sizes, then adaptability improves, but manufacturing precision requirements increase due to translated pad configurations
Solution Approach 1:
The offset interposer design incorporates pre-calculated and pre-positioned pad offsets during the manufacturing planning stage. The X-direction offset between POP-side pads and land-side pads is determined in advance based on device specifications, allowing manufacturing processes to be prepared with precise positioning data before actual production. This preliminary action reduces the precision burden during actual assembly by having all alignment parameters predetermined.
Solution Approach 2:
The interposer acts as an intermediary component that absorbs and compensates for alignment variations between logic devices and memory devices. The offset pad configuration serves as a mediator that can accommodate size differences and positioning variations, reducing the stringency of precision requirements by providing a buffer zone that can absorb minor misalignments while maintaining proper electrical connections.
3Reliability
If POP-side pads are offset relative to land-side pads, then trace lengths are reduced and signal integrity improves, but interposer design complexity increases
Solution Approach 1:
The asymmetric offset configuration of POP-side pads relative to land-side pads creates more direct and shorter trace paths for electrical connections. By positioning POP-side pads in the X-direction offset from land-side pads, the interconnect traces can be routed more efficiently with fewer bends and shorter lengths, improving signal integrity. The controlled asymmetry achieves the dual benefit of reduced trace length and manageable design complexity.
Data Source
Figure 1a~1b
Figure 2
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AI summary
A package comprises: a first substrate; an interconnect structure having a first side coupled to the first substrate and a second side over the first side, the interconnect structure having a first width; an interposer having a first side, a second side, an inner edge, and an outer edge, wherein the first side of the interposer is coupled to the second side of the interconnect structure; an electronic device coupled to the second side of the interconnect structure, wherein the inner edge of the interposer surrounds the electronic device, and the electronic device has a second width; a second substrate, the second substrate coupled to the second side of the interposer, and the second substrate over the electronic device, wherein the second substrate has a third width, the third width less than the first width, and the third width greater than the second width; and a memory die coupled to the second substrate, the memory die vertically over the electronic device.