Offset Stacked Semiconductor Chips with Columnar Electrodes
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Solution Overview
Problem
In semiconductor device packaging, existing technologies face challenges in maintaining a consistent and short wiring length between semiconductor chips and external devices, leading to variations that hinder performance and efficiency.
Innovation Solution
The semiconductor device employs a stacked configuration with offset semiconductor chips, columnar electrodes, and a redistribution layer, where the semiconductor chip is positioned equidistant from columnar electrodes to minimize wiring length variation and optimize connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If semiconductor chips are stacked on a substrate in existing package structures, then the device can be manufactured, but the wiring length varies and cannot be consistently short
Solution Approach 1:
The patent transitions from a planar arrangement of semiconductor chips to a three-dimensional stacked configuration. Multiple semiconductor chips are stacked in the vertical direction (first direction) with offset positioning in the horizontal direction (second direction). This dimensional change enables shorter wiring lengths while maintaining consistent connectivity, as the columnar electrodes extend vertically through the stack to connect chips at different heights to the same external terminal position.
Solution Approach 2:
The patent implements a nested structure where multiple semiconductor chips are stacked within a compact vertical space. Each semiconductor chip is nested above the previous one, with columnar electrodes penetrating through the stack to provide electrical connections. This nesting approach consolidates multiple components into a compact volume while maintaining controlled wiring paths.
2Speed
If wiring length is shortened to improve performance, then signal transmission is enhanced, but wiring length variation increases
Solution Approach 1:
The patent employs asymmetric positioning of semiconductor chips in the stacked configuration. The chips are offset in the second direction (horizontal) while maintaining their stack position in the first direction (vertical). This asymmetric arrangement, combined with columnar electrodes that extend vertically, creates consistent wiring path lengths from each chip to the external terminal despite the offset positions, thereby achieving both short and uniform wiring lengths.
3Adaptability or versatility
If multiple semiconductor chips are connected to external devices, then device functionality is enhanced, but wiring length control becomes difficult
Solution Approach 1:
The columnar electrodes serve multiple functions simultaneously: they provide mechanical support for the stacked semiconductor chips, establish electrical connections between chips at different vertical positions, and route signals to external terminals. This multi-functional design enables multiple semiconductor chips to be connected to external devices while maintaining consistent wiring length control through the unified columnar electrode structure.
Data Source
AI summary
A semiconductor device includes a first stacked body including first semiconductor chips stacked in a first direction and offset relative to each other in a second direction; a first columnar electrode coupled to the first semiconductor chip and extending in the first direction; a second stacked body arranged relative to the first stacked body in the second direction and including second semiconductor chips stacked in the first direction and offset relative to each other in the second direction; a second columnar electrode coupled to the second semiconductor chip and extending in the first direction; and a third semiconductor chip arranged substantially equally spaced to the first columnar electrode and the second columnar electrode.