Offset-Stacked Semiconductor Packages With Vertical Connectors

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving high density, high performance, and a smaller form factor, particularly in stacking semiconductor dies while minimizing package width and thickness.

Innovation Solution

A method of manufacturing semiconductor packages involves forming a first encapsulant layer, offset stacking semiconductor dies, creating vertical connectors, encapsulating with a second encapsulant layer, and forming redistribution layers connected to the connectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple semiconductor dies are stacked perpendicular to each other to achieve high density, then the integration capacity and data processing capability are improved, but the manufacturing complexity and alignment precision requirements increase

Engineering Contradiction:
Improveintegration capacityVSAvoidstacking structure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor package into multiple discrete dies stacked vertically, with each die being a separate functional unit. This segmentation allows for independent manufacturing and testing of each die before stacking, reducing overall manufacturing complexity while achieving high integration capacity through vertical arrangement

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar arrangement of dies to vertical stacking in the third dimension. By arranging dies perpendicular to each other along the vertical axis, the package achieves high density integration without increasing the footprint area, effectively utilizing vertical space to resolve the contradiction between integration capacity and form factor

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If semiconductor dies are offset stacked to reduce package width and thickness, then the form factor is improved for mobile devices, but the alignment precision and connection reliability requirements increase

Engineering Contradiction:
Improvepackage form factorVSAvoidalignment precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent employs offset stacking where successive dies are positioned at different horizontal locations rather than directly aligned vertically. This asymmetric arrangement reduces the overall package width and thickness while maintaining connection reliability through carefully designed connector positions that accommodate the offset configuration

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent introduces vertical connectors as intermediary elements that bridge the offset dies. These connectors are positioned to align with connection pads on each die despite the offset arrangement, serving as mediators that maintain electrical connectivity while allowing the dies to be positioned asymmetrically for compact form factor

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If vertical connectors are formed to connect stacked dies, then the electrical connectivity between dies is improved, but the manufacturing process complexity and encapsulation difficulty increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent forms vertical connectors before final encapsulation of the stacked dies. By preparing the connector structures in advance while the dies are still accessible on the carrier, the manufacturing process simplifies subsequent encapsulation steps and ensures proper connector positioning before the package is sealed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The vertical connectors are designed to self-align with connection pads on the dies during the stacking process. The connector geometry and positioning features enable automatic alignment without requiring complex external alignment mechanisms, reducing manufacturing process complexity while ensuring reliable electrical connectivity

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12604784B2Stack packages and methods of manufacturing the same
Publication Date: 2026.04.14 SK HYNIX INC
  • US12604784B2 patent drawing
  • US12604784B2 patent drawing
  • US12604784B2 patent drawing

AI summary

A stack package, and a method of manufacturing the same, includes a first encapsulant layer formed on a carrier. Also semiconductor dies are sequentially offset stacked on the first encapsulant layer. Vertical connectors connected to the semiconductor dies are formed. A second encapsulant layer coupled to the first encapsulant layer is formed to encapsulate the vertical connectors and the semiconductor dies. Redistribution layers connected to the vertical connectors are formed on the second encapsulant layer.