OLED Array Substrate Touch Electrode Layout for Parasitic Capacitance Reduction
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Solution Overview
Problem
In capacitive in-cell touch panels, parasitic capacitance between the cathode and anode voltage lines can slow down touch response, affecting display brightness and quality due to touch motions.
Innovation Solution
An array substrate with a novel cathode layer pattern and signal line layout, including touch electrodes that apply wave-shaped voltages during touch-sensing periods, reduces parasitic capacitance and stabilizes display performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional cathode layer structure is used in capacitive in-cell touch panels, then the touch sensing function can be implemented, but parasitic capacitance is formed between the cathode layer and anode voltage lines which slows down touch response
Solution Approach 1:
The patent extracts the touch sensing function from the conventional cathode layer by introducing separate touch electrodes that extend beyond the display area. This separation allows the touch sensing function to be independent from the display function, enabling touch response without being constrained by parasitic capacitance in the display region.
Solution Approach 2:
The patent extends touch electrodes in the vertical direction beyond the display area boundaries, utilizing the space dimension outside the display region. This dimensional extension allows touch sensing to occur in a region free from parasitic capacitance interference with anode voltage lines.
2Speed
If touch electrodes are extended beyond display area, then parasitic capacitance is reduced and touch response is improved, but the device structure becomes more complex
Solution Approach 1:
The patent makes the cathode layer structure multi-functional by having touch electrodes serve both as part of the cathode structure and as dedicated touch sensing elements. This universal design allows the same structural elements to fulfill multiple functions without requiring entirely separate systems.
Solution Approach 2:
The patent merges the touch electrode structure with the cathode layer structure, combining what could have been separate components into a unified design. This integration reduces overall device complexity while achieving the goal of reduced parasitic capacitance.
3Object-generated harmful factors
If touch electrodes are arranged in specific patterns, then parasitic capacitance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the touch electrode structure into multiple independent electrodes arranged in specific patterns (such as interdigitated or comb-like structures). This segmentation allows each electrode to be manufactured independently with standard precision, while the overall pattern achieves the goal of reducing parasitic capacitance through increased spacing and optimized geometry.
Data Source
AI summary
The present disclosure provides an array substrate for an organic light-emitting diode (OLED) display panel. The array substrate includes a substrate, a thin film transistor (TFT) layer comprising a plurality of TFTs, and an anode layer comprising a plurality of anode electrodes. The array substrate also includes an organic layer comprising a plurality of organic units corresponding to anode electrodes, and a cathode layer comprising a plurality of touch electrodes for a time-sharing operation. Each touch electrode corresponds to a portion of the plurality of organic units, the plurality of the touch electrodes being arranged to be applied with a normal cathode voltage in a displaying period and to be applied with a touch cathode voltage in a touch-sensing period.