OLED Pixel Barrier Wall Layout for Higher Aperture and Deposition Reliability
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Solution Overview
Problem
Current organic light-emitting display apparatus manufacturing processes face challenges in reducing manufacturing time and costs while improving image quality and reliability, particularly due to complex pixel arrangements and deposition processes.
Innovation Solution
The proposed solution involves a specific pixel arrangement structure with a thin film transistor on a substrate, a first insulating layer with a barrier wall and flat portion, and a pixel electrode connected to the transistor, where the pixel defining layer partially exposes the electrode, allowing for improved aperture ratios and deposition reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a conventional pixel arrangement structure is used, then the manufacturing process is simpler, but the aperture ratio is reduced and image quality deteriorates
Solution Approach 1:
The pixel electrode structure is segmented into multiple regions: a first pixel electrode region, a second pixel electrode region, and a third pixel electrode region. The barrier wall is also segmented into a first barrier wall and a second barrier wall that are spaced apart from each other. This segmentation allows for increased aperture ratio while maintaining structural integrity and preventing short circuits.
Solution Approach 2:
The barrier wall is configured to extend in multiple dimensions: vertically from the substrate through the insulating layer, and horizontally with the first and second barrier walls spaced apart. This multi-dimensional arrangement increases the effective aperture area while maintaining proper electrical isolation and structural support.
2Reliability
If the deposition process is performed without proper barrier structures, then the manufacturing time is reduced, but the organic emission layer becomes damaged and reliability decreases
Solution Approach 1:
The barrier wall is formed in advance during the insulating layer formation process, before the organic emission layer deposition. The barrier wall protrudes from the substrate through the insulating layer to a height that prevents damage during subsequent deposition processes. This preliminary structural preparation ensures reliability without adding significant manufacturing steps.
Solution Approach 2:
The barrier wall serves as a protective cushion structure that prevents the organic emission layer from being damaged during the deposition process. By having this protective structure in place beforehand, the patent eliminates the need for additional protective measures during deposition, maintaining manufacturing efficiency while ensuring reliability.
3Area of moving object
If the pixel electrode is fully exposed, then the aperture ratio is maximized, but short circuits occur between adjacent pixels
Solution Approach 1:
The barrier wall is divided into a first barrier wall and a second barrier wall that are spaced apart from each other, creating separate isolation zones. This segmentation allows the pixel electrode to be fully exposed for maximum aperture ratio while maintaining electrical isolation between adjacent pixels through the spaced barrier structures.
Solution Approach 2:
The barrier wall acts as an intermediary structure between adjacent pixel electrodes. By positioning the first and second barrier walls at specific spaced intervals, the patent creates an intermediate isolation zone that prevents direct contact between pixel electrodes while allowing maximum exposure of the pixel electrode area for light emission.
Data Source
AI summary
An organic light-emitting display apparatus is provided as follows. A thin film transistor is disposed on a substrate. A first insulating layer covers the thin film transistor. The first insulating layer includes a barrier wall and a flat portion. The barrier wall protrudes from the flat portion. A pixel electrode is disposed on the flat portion surrounded by the barrier wall. The pixel electrode is electrically connected to the thin film transistor. A pixel defining layer is disposed on the pixel electrode and partially exposes the pixel electrode.