OLED Gate Buffer Layer Reduces Interface Stress

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Solution Overview

Problem

The interface stress between molybdenum and silicon oxide in conventional OLED display panels leads to poor bonding, causing the interlayer dielectric layer to fall off and affecting the characteristics and yield of thin film transistors.

Innovation Solution

A gate buffer layer of molybdenum oxide is formed over the gate dielectric layer, with an interlayer dielectric layer comprising silicon oxide and silicon nitride, reducing interface stress and improving bonding between the gate metal and interlayer dielectric layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If molybdenum gate metal and silicon oxide interlayer dielectric layer are directly bonded, then the manufacturing process is simple, but the interface stress is large causing poor bonding and layer delamination

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidbonding reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A gate buffer layer made of molybdenum oxide is introduced between the molybdenum gate metal layer and the silicon oxide interlayer dielectric layer. This intermediate layer acts as a mediator that gradually transitions the material properties between the two dissimilar materials, reducing the interface stress and preventing delamination while maintaining manufacturing simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate buffer layer is formed by oxidizing the molybdenum gate metal layer to create a composite structure where molybdenum oxide serves as an intermediate material. This composite approach combines the advantages of both molybdenum (low stress) and silicon oxide (good dielectric properties) while eliminating their direct incompatibility.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a gate buffer layer of molybdenum oxide is formed by oxidizing the gate metal layer, then bonding reliability is improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate buffer layer is formed by performing oxidation on the gate metal layer as a preliminary step before depositing the interlayer dielectric layer. This preliminary action prepares the gate metal surface with appropriate properties (molybdenum oxide formation) that ensure good bonding with the subsequent silicon oxide layer, thereby improving reliability without significantly complicating the overall process.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The molybdenum oxide buffer layer effectively reduces interface stress, preventing the interlayer dielectric layer from falling off and enhancing the characteristics and yield of thin film transistors in OLED display panels.

Implementation Method 1

a material constituting the gate buffer layer is an oxide of the gate metal layer, and by oxidizing the gate metal layer, the oxide is formed on a top of the gate metal layer to form the gate buffer layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

an interlayer dielectric layer is deposited by plasma-enhanced chemical vapor deposition (PECVD) after the gate metal is completed

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS11088231B2Organic light emitting diode display panel and manufacturing method thereof
Publication Date: 2021.08.10 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US11088231B2 patent drawing
  • US11088231B2 patent drawing

AI summary

An organic light emitting diode (OLED) display panel and manufacturing method thereof are provided. The display panel includes a substrate, a thin film transistor layer, and a light emitting structure, wherein the thin film transistor layer includes a polysilicon layer, a gate dielectric layer positioned on the polysilicon layer, a gate metal layer positioned on the gate dielectric layer, a gate buffer layer positioned on the gate dielectric layer, and an interlayer dielectric layer covering the gate dielectric layer, the gate metal layer, and the gate buffer layer.