OLED Array Substrate Isolation Mesa for Crosstalk Reduction

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Solution Overview

Problem

Conventional OLED display panels face issues with sub-pixels being affected by adjacent voltages, leading to deteriorated display effects and reduced resolution due to lack of effective isolation between sub-pixels.

Innovation Solution

An array substrate with isolation mesas in each pixel groove, where the first sub-pixel is on the bottom surface and the second sub-pixel is on the side of the isolation mesa, ensuring the light-emitting layers are on different planes and preventing voltage interference, while maintaining a high aperture ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple sub-pixels are configured in a same display pixel to increase PPI, then the resolution of the display panel is improved, but the sub-pixels are affected by adjacent voltages resulting in deteriorated display effect

Engineering Contradiction:
ImproveresolutionVSAvoiddisplay effect
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent divides each pixel groove into multiple independent regions using isolation mesas. Each sub-pixel is isolated by its own isolation mesa structure, segmenting the electrical and optical fields between adjacent sub-pixels. This prevents voltage crosstalk while maintaining high PPI through multiple sub-pixels per display pixel.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation mesa acts as an intermediary structure between adjacent sub-pixels. It provides electrical isolation through its insulating material and physical separation, preventing direct voltage interference between sub-pixels while allowing each to function independently for high-resolution display.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If isolation structures are added between sub-pixels to prevent voltage interference, then the display effect is improved, but the aperture ratio is reduced

Engineering Contradiction:
Improvedisplay effectVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The isolation mesa extends vertically from the substrate upward, utilizing the third dimension (height) for isolation rather than only horizontal spacing. This vertical isolation structure provides effective voltage blocking without consuming excessive horizontal area, thereby maintaining a high aperture ratio while preventing voltage crosstalk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The isolation mesa is positioned locally at specific critical regions between sub-pixels where voltage interference occurs, rather than uniformly across the entire pixel structure. This localized isolation approach provides targeted voltage blocking while minimizing the overall area consumed by isolation structures.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10950632B2Array substrate, method for fabricating the same and display panel
Publication Date: 2021.03.16 WUHAN TIANMA MICRO ELECTRONICS CO LTD
  • US10950632B2 patent drawing
  • US10950632B2 patent drawing
  • US10950632B2 patent drawing

AI summary

An array substrate, a method for fabricating the array substrate and a display panel. The array substrate is provided with at least one isolation mesa in each of multiple pixel grooves in a pixel-defining layer, so that a light-emitting layer of a second sub-pixel located on the isolation mesa and a light-emitting layer of a first sub-pixel located on an exposed portion of a bottom surface of the pixel groove are on different planes and thereby isolated. It is prevented that an adjacent sub-pixel is influenced via the light-emitting layer, in a case that the anode of the second sub-pixel and the anode of the first sub-pixel receive different voltages. The isolation mesa does not form a non-emitting region in the pixel groove. An aperture ratio of the array substrate is not reduced. High PPI of the array substrate is ensured.