Organic Light-Emitting Display Device With Layered Gate Electrode

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In organic light-emitting display devices, signal distortion due to line resistance in metal wires leads to uneven luminance and reduced reliability, as signals supplied to pixels far from the source are affected.

Innovation Solution

The design includes a thin film transistor with a gate electrode on a different layer than the scan line, an active layer made of oxide semiconductor, and a capacitor with electrodes on various layers, along with low resistance scan lines and insulating layers to reduce RC load and increase aperture ratio, while the capacitor is formed with multiple electrodes to minimize area and maximize capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal wires are used for scan lines, data lines, and power lines, then electrical connection is achieved, but line resistance causes signal distortion and uneven luminance

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidline resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent divides the electrical connection system into multiple layers with scan lines on the first substrate and gate electrodes on the second substrate, separating different functional components to reduce interference and resistance effects in signal transmission

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar wiring to three-dimensional stacked architecture, placing scan lines and gate electrodes on different layers connected through contact holes, thereby reducing line resistance and improving signal transmission quality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If gate electrode and scan line are on the same layer, then manufacturing is simplified, but RC load increases and aperture ratio decreases

Engineering Contradiction:
Improvelayer alignmentVSAvoidRC load
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent positions the gate electrode on a different layer (second substrate) than the scan line (first substrate), connecting them through contact holes. This vertical separation reduces RC load while maintaining manufacturing feasibility through aligned contact hole formation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact holes are formed by sequentially penetrating insulating layers to connect the scan line to the gate electrode, creating a nested structure that simplifies the overall manufacturing process while reducing electrical resistance

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If capacitor occupies large area, then capacitance increases, but aperture ratio decreases

Engineering Contradiction:
ImprovecapacitanceVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent forms the capacitor using vertical stacking with first, second, and third capacitor electrodes on different layers, connected through contact holes. This three-dimensional configuration increases capacitance while minimizing the horizontal area occupied, thereby maintaining high aperture ratio

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9105864B2Organic light-emitting display device and method of manufacturing the same
Publication Date: 2015.08.11 SAMSUNG DISPLAY CO LTD
  • US9105864B2 patent drawing
  • US9105864B2 patent drawing
  • US9105864B2 patent drawing

AI summary

An organic light-emitting display device may include a plurality of scan lines, a plurality of data lines, and a plurality of pixels located at an intersection region of the scan line and the data line, wherein the organic light-emitting display device includes a thin film transistor including a gate electrode on a different layer than a scan line, an active layer on the gate electrode, and source and drain electrodes that are in contact with source and drain regions of the active layer, and a capacitor including a first capacitor electrode on the same layer as the scan line, a second capacitor electrode on the gate electrode, and a third electrode on the same layer as the source and drain electrodes.