Array Substrate Opening Overlap for Higher OLED Aperture Ratio
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Solution Overview
Problem
Current OLED display panels face limitations in aperture ratio due to non-overlapping projections of holes in the array substrate, which restricts the opening area of pixels and overall display performance.
Innovation Solution
The array substrate design includes overlapping projections of openings in dielectric and conductive layers to reduce the area required for forming holes, increasing the aperture ratio by partially overlapping the projections of these openings, thereby enhancing pixel opening area and display efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the projections of holes in dielectric and conductive layers are made non-overlapping to simplify manufacturing, then the manufacturing process is easier, but the aperture ratio and pixel opening area are reduced
Solution Approach 1:
The patent merges the projections of holes from different layers (first dielectric layer, second dielectric layer, third dielectric layer, and conductive layers) to overlap on the substrate. This consolidation reduces the total area occupied by holes while maintaining their individual functional requirements, thereby increasing the aperture ratio without significantly complicating the manufacturing process.
Solution Approach 2:
The patent utilizes the vertical dimension by stacking multiple dielectric and conductive layers with holes at different heights. By arranging holes in different layers to overlap when projected onto the substrate, the design effectively uses the third dimension (vertical stacking) to resolve the two-dimensional area conflict, increasing aperture ratio while maintaining manufacturing feasibility.
2Ease of manufacture
If the area for forming holes is increased to ensure proper spacing and manufacturing tolerance, then manufacturing is easier, but the pixel opening area and display efficiency are reduced
Solution Approach 1:
The patent combines the hole positions from multiple layers into overlapping projections on the substrate. This merging allows the holes to share the same lateral space while maintaining their vertical separation, thereby reducing the total area required for hole formation and increasing pixel opening area without compromising manufacturing tolerances.
Solution Approach 2:
The patent implements a nested structure where holes in upper layers are positioned to overlap with holes in lower layers when projected onto the substrate. This nesting arrangement allows multiple functional holes to occupy the same footprint area, effectively reducing the total area consumed by holes and improving display efficiency.
3Area of stationary object
If overlapping projections of openings are implemented to increase aperture ratio, then display performance is improved, but the manufacturing precision requirements are increased
Solution Approach 1:
The patent merges hole projections from multiple layers to overlap on the substrate, which increases aperture ratio. The manufacturing precision challenge is addressed by using standard photolithography and etching processes that can achieve the required alignment, supported by the inherent layer registration capabilities of OLED manufacturing equipment.
Solution Approach 2:
The patent resolves the precision challenge by utilizing the vertical dimension for layer separation. While lateral alignment precision is required for overlapping projections, the vertical stacking provides natural separation that reduces the complexity of maintaining precise lateral positioning throughout the entire structure.
Data Source
AI summary
Embodiments of the present disclosure provide an array substrate and a related display panel and a method of manufacturing thereof. An array substrate comprises: a substrate; a first light-shielding layer; a first dielectric layer which comprises a first opening; a transistor, which comprises an active layer with a first source/drain region, a second source/drain region, and a channel region; a second dielectric layer, which comprises a second opening, wherein a second projection of the second opening on the substrate at least partially overlaps with a first projection of the first opening on the substrate; a first conductive layer; a third dielectric layer, which comprises a third opening, wherein a third projection of the third dielectric layer on the substrate at least partially overlaps with the first projection and the second projection; a fourth dielectric layer, which comprises a fourth opening, wherein a fourth projection of the fourth dielectric layer on the substrate at least partially overlaps with the first projection of the first opening, the second projection of the second opening, and the third projection of the third opening; and a second conductive layer.