OLED Unit Pixel Capacitor via 3D Protrusion Electrodes
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Solution Overview
Problem
Existing organic light emitting display (OLED) devices face challenges in increasing the capacitance of unit pixels without altering the size of electrodes or the dielectric material, as increasing electrode size is limited by design constraints, reducing dielectric layer thickness can lead to electric short circuits, and enhancing the dielectric constant requires new materials.
Innovation Solution
The implementation of a unit pixel design featuring a capacitor with increased surface area electrodes due to protrusion structures on the first and second wiring patterns, which are connected via a via-hole in the planarization layer, allowing for increased capacitance without changing the electrode size or dielectric material, thereby minimizing data signal loss and achieving higher light emission luminance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of electrodes of the capacitor is increased, then the capacitance is improved, but the design constraints of the unit pixel are violated
Solution Approach 1:
The patent transitions from a planar electrode structure to a three-dimensional structure by forming protrusions on the first wiring pattern and corresponding recesses on the second wiring pattern. This vertical dimensionality change increases the effective surface area of the electrodes without expanding the horizontal footprint, thereby increasing capacitance while maintaining compliance with unit pixel design constraints.
2Quantity of substance
If the thickness of the dielectric layer is decreased, then the capacitance is improved, but electric short circuit occurs
Solution Approach 1:
Instead of decreasing the dielectric layer thickness, the patent increases capacitance by creating vertical protrusions and recesses that increase the effective electrode surface area. This approach maintains the original dielectric layer thickness, ensuring electrical insulation is preserved while achieving higher capacitance through increased surface area in the vertical dimension.
3Quantity of substance
If the dielectric constant of the dielectric layer is increased, then the capacitance is improved, but new materials are required
Solution Approach 1:
The patent changes the geometric parameters of the electrode structure (creating protrusions and recesses) rather than changing the material property (dielectric constant). This parameter change in structure allows capacitance increase without requiring new dielectric materials, maintaining ease of manufacture with existing materials and processes.
4Quantity of substance
If the surface area of the electrodes is increased, then the capacitance is improved, but the unit pixel layout is compromised
Solution Approach 1:
The patent resolves the layout conflict by utilizing the vertical dimension through protrusions and recesses. The horizontal projection of the capacitor maintains the original compact layout, while the vertical structure provides increased surface area for higher capacitance. This allows the unit pixel layout to remain intact while achieving the desired capacitance increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively enhances the capacitance of the capacitor in unit pixels, reducing data signal loss and achieving sufficient light emission luminance in OLED devices, thereby improving the overall performance and quality of the display.
Implementation Method 1
an organic light emitting diode
Data Source
AI summary
A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of the second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.