OLED Pixel Capacitor Stack for High-Resolution Voltage Retention

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Solution Overview

Problem

High-resolution organic light emitting display devices face challenges in maintaining sufficient storage capacitance due to reduced pixel area, which affects the ability to secure voltage for one frame, leading to potential display issues.

Innovation Solution

Incorporating additional capacitors to assist the storage capacitor, ensuring sufficient capacitance is maintained even in narrow areas, by connecting them in parallel to the storage capacitor to enhance voltage retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel area is reduced to achieve high resolution, then display resolution is improved, but storage capacitor capacity deteriorates

Engineering Contradiction:
Improvedisplay resolutionVSAvoidstorage capacitor capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent combines multiple capacitors (first storage capacitor, second storage capacitor, and third storage capacitor) in parallel to form a composite storage capacitor structure. This merging approach increases the total capacitance value without requiring additional pixel area, as the capacitors share common electrodes and insulating layers. The combined capacitance compensates for the reduced area available in high-resolution displays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes vertical stacking to create multiple capacitor structures within the same planar footprint. By forming capacitors at different height levels (using multiple insulating layers and electrode arrangements), the design effectively adds a vertical dimension to the capacitor architecture, increasing total capacitance without consuming additional horizontal pixel area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If pixel area is reduced to achieve high resolution, then display resolution is improved, but voltage retention deteriorates

Engineering Contradiction:
Improvedisplay resolutionVSAvoidvoltage retention
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent merges multiple storage capacitors in parallel to increase total capacitance, which directly improves voltage retention capability. The combined capacitance of the first, second, and third storage capacitors ensures sufficient charge storage to maintain stable voltage levels throughout the display frame period, even in reduced-area high-resolution pixels.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If pixel area is reduced to achieve high resolution, then display resolution is improved, but device complexity deteriorates

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent designs the third conductive layer to serve multiple functions: it forms the second electrode of the first storage capacitor, the first electrode of the second storage capacitor, and the second electrode of the third storage capacitor. This multi-functionality reduces the need for separate dedicated structures for each capacitor, thereby simplifying the overall pixel structure while maintaining high total capacitance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

By stacking capacitor structures vertically across multiple insulating layers, the patent increases capacitance in the vertical dimension rather than expanding horizontally. This approach maintains compact pixel area while achieving the required total capacitance, avoiding the need for larger, more complex lateral arrangements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3683836B1Display device
Publication Date: 2024.11.27 SAMSUNG DISPLAY CO LTD
  • EP3683836B1 patent drawingFigure 1
  • EP3683836B1 patent drawingFigure 2
  • EP3683836B1 patent drawingFigure 3

AI summary

A display device having high resolution includes: a first conductive layer, an active pattern, second to fourth conductive layers, and a pixel electrode sequentially formed on a substrate, with first to fourth insulating layers separately interposed therebetween, the first conductive layer including a lower pattern, the active pattern including a source region, a channel region, and a drain region, the second conductive layer including a gate electrode overlapping the channel region and a driving gate electrode connected to the gate electrode, the third conductive layer including a capacitor electrode overlapping the driving gate electrode, the fourth conductive layer including an additional capacitor electrode overlapping the capacitor electrode. The driving gate electrode and the capacitor electrode may form a storage capacitor, the pixel electrode and the additional capacitor electrode may form a first additional capacitor, and the capacitor electrode and the additional capacitor electrode may form a second additional capacitor.