OLED Pixel Circuit Layout Using PMOS Gate Light Shielding
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Solution Overview
Problem
In organic light-emitting display devices using both p-type metal-oxide-semiconductor (PMOS) and n-type metal-oxide-semiconductor (NMOS) transistors, the need for a separate lower light-shielding pattern limits pixel space, hindering resolution improvement.
Innovation Solution
The gate electrode of the PMOS transistor is utilized as a lower light-shielding pattern for the NMOS transistor, eliminating the need for an additional light-shielding layer and optimizing pixel space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a separate lower light-shielding pattern is added to shield the NMOS transistor, then light shielding effectiveness is improved, but pixel area is reduced and resolution improvement is hindered
Solution Approach 1:
The patent merges the gate electrode of the PMOS transistor with the lower light-shielding pattern function. The gate electrode is extended to overlap the NMOS transistor channel region, serving dual purposes: controlling the PMOS transistor and shielding the NMOS transistor from light. This eliminates the need for a separate light-shielding pattern layer, thereby preserving pixel area while maintaining light shielding effectiveness.
Solution Approach 2:
The gate electrode of the PMOS transistor is designed to perform multiple functions: it serves as the control electrode for the PMOS transistor and simultaneously acts as the lower light-shielding pattern for the NMOS transistor. This multi-functional design reduces the total number of required components and optimizes the use of pixel space.
2Area of stationary object
If the gate electrode and lower light-shielding pattern are formed in the same layer, then space utilization is improved, but manufacturing complexity increases
Solution Approach 1:
The gate electrode and lower light-shielding pattern are merged into a single conductive layer structure. The gate electrode material and layer are extended to fulfill both the electrical connection function for PMOS control and the optical shielding function for NMOS protection, simplifying the manufacturing process by reducing the number of deposition steps.
Solution Approach 2:
While formed in the same layer, the structure is segmented into functional regions: the gate electrode portion connected to the PMOS gate and the extended portion serving as the light-shielding pattern over the NMOS channel. This segmentation allows independent optimization of each function's geometry while maintaining a unified manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the resolution of organic light-emitting display devices by reducing unnecessary space requirements and improving light management within the pixel structure.
Implementation Method 1
a gate electrode of the PMOS transistor and the lower light-shielding pattern may be formed in the same layer
Data Source
AI summary
A display device includes a signal line extending in a first direction, a first transistor configured to control a driving current, a light-emitting element electrically coupled to a second electrode of the first transistor, a second transistor electrically coupled to a first electrode of the first transistor and configured to transfer a data voltage, a first scan line electrically coupled to a gate electrode of the second transistor and extending in the first direction, a third transistor including a first electrode electrically coupled to the second electrode of the first transistor and a second electrode electrically coupled to a gate electrode of the first transistor and a second scan line electrically coupled to a gate electrode of the third transistor and extending in the first direction, wherein the second scan line overlaps one selected from among the signal line and the first scan line.