On-Chip Breakpoint Debugging Using Off-Chip Memory Output

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Solution Overview

Problem

Traditional chip algorithm debugging is inefficient due to the inability to output results in real time, requiring copying to another platform, which prevents effective debugging during the process.

Innovation Solution

An on-chip code breakpoint debugging method and system that allows output information to be stored and analyzed in off-chip memory, enabling real-time debugging and efficient breakpoint management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If traditional chip algorithm debugging is performed by copying results to another platform, then the debugging can be done externally, but real-time debugging is impossible and debugging efficiency is low

Engineering Contradiction:
Improvedebugging capabilityVSAvoiddebugging efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

An off-chip memory buffer is introduced as an intermediary component between the chip processor and external debugging platforms. This buffer temporarily stores output information generated during chip algorithm execution, enabling the debugger to access and analyze intermediate results without requiring continuous external platform intervention, thus achieving real-time debugging capability while maintaining external analysis capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent adds a temporal dimension to the debugging process by implementing a time-based buffer storage mechanism. Instead of immediately transferring all results to external platforms, the system stores intermediate results in off-chip memory with timestamps, allowing debuggers to retrieve and analyze results at different time points, effectively enabling real-time observation of algorithm execution without sacrificing external debugging capability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple breakpoints are set for debugging, then comprehensive debugging coverage is achieved, but the complexity of managing multiple breakpoints increases

Engineering Contradiction:
Improvedebugging coverageVSAvoidbreakpoint management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a breakpoint management system that creates and manages multiple breakpoint instances simultaneously in the on-chip code. Each breakpoint is configured with unique identification and can be independently enabled or disabled. The system copies the breakpoint configuration structure to allow multiple instances, making it easy to set up comprehensive debugging coverage without manually managing complex interdependencies between breakpoints

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The breakpoint management system automatically handles the coordination and state tracking of multiple breakpoints without requiring manual intervention. When multiple breakpoints are set, the system self-manages their execution states, automatically determines which breakpoint should be active based on program counter position, and handles the switching between breakpoints, thereby reducing the perceived complexity for the user while maintaining comprehensive debugging coverage

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3798850B1On-chip code breakpoint debugging method, on-chip processor, and chip breakpoint debugging system
Publication Date: 2025.11.19 SHANGHAI CAMBRICON INFORMATION TECH CO LTD
  • EP3798850B1 patent drawingFigure 1-1
  • EP3798850B1 patent drawingFigure 1-2
  • EP3798850B1 patent drawingFigure 1-3

AI summary

The present invention relates to an on-chip code breakpoint debugging method, an on-chip processor, and a chip breakpoint debugging system. The method comprises: the on-chip processor starts and executes an on-chip code, and an output function is set at a breakpoint position of the on-chip code; the on-chip processor obtains output information of the output function, the output information is output information of the output function when the on-chip code is executed to the output function; the on-chip processor stores the output information into an off-chip memory. In the embodiments of the present invention, according to the output information, which is stored in the off-chip memory, of the output function, the on-chip processor can obtain execution conditions of breakpoints of the on-chip code in real time, can achieve the purpose of debugging multiple breakpoints in the on-chip code at the same time, and debugging efficiency of the on-chip code is improved.