On-Chip Code Breakpoint Debugging With Real-Time Off-Chip Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional chip algorithm debugging is inefficient due to the inability to output results in real time, requiring data transfer to another platform, leading to high bandwidth requirements and energy consumption.
Innovation Solution
Implementing an operation device with operation modules that store required data in their own storage units, reducing data access bandwidth and enabling parallel computational operations, thereby eliminating the need for large storage devices and enhancing scalability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data required by each operation module is stored in a memory, then data access bandwidth is increased, but device cost and bandwidth requirements increase
Solution Approach 1:
The patent divides the centralized memory storage into distributed storage units, where each operation module has its own local storage unit. This segmentation reduces the bandwidth requirements of the centralized memory while maintaining fast data access for each operation module.
Solution Approach 2:
The patent implements local storage units within each operation module to store data locally, reducing the need for high-bandwidth centralized memory access. This local quality approach allows each module to access its required data quickly without competing for centralized memory bandwidth.
2Productivity
If a large storage device with high data read and write speed is used, then data access performance is improved, but device cost increases
Solution Approach 1:
The patent segments the storage function into multiple small storage units distributed across operation modules rather than using one large high-performance storage device. This approach achieves high data access performance for each module while using lower-cost, smaller storage units.
Solution Approach 2:
Each operation module serves its own data storage needs through its local storage unit, eliminating the need for a centralized high-performance storage device. This self-service approach reduces overall device cost while maintaining adequate data access performance.
3Measurement precision
If data is copied to another platform for output, then complete chip algorithm results are obtained, but debugging efficiency decreases
Solution Approach 1:
The patent introduces a data output unit as an intermediary that enables real-time data output from the chip during debugging. This intermediary component allows debuggers to observe intermediate results without copying data to another platform, significantly improving debugging efficiency while maintaining result accuracy.
4Adaptability or versatility
If operation modules access centralized memory, then data sharing is facilitated, but bandwidth requirements and energy consumption increase
Solution Approach 1:
The patent segments the centralized memory into distributed storage units associated with each operation module. This segmentation reduces the need for high-bandwidth centralized memory access, thereby reducing energy consumption while maintaining data sharing capabilities through the interconnection network.
Solution Approach 2:
The patent changes the storage architecture parameter from centralized to distributed, which reduces the bandwidth and energy requirements for data access while maintaining the ability of operation modules to share data when needed.
Data Source
Figure 3-1
Figure 3-2~3-3
Figure 3-4~3-5
AI summary
The present invention relates to an on-chip code breakpoint debugging method, an on-chip processor, and a chip breakpoint debugging system. The method comprises: the on-chip processor starts and executes an on-chip code, and an output function is set at a breakpoint position of the on-chip code; the on-chip processor obtains output information of the output function, the output information is output information of the output function when the on-chip code is executed to the output function; the on-chip processor stores the output information into an off-chip memory. In the embodiments of the present invention, according to the output information, which is stored in the off-chip memory, of the output function, the on-chip processor can obtain execution conditions of breakpoints of the on-chip code in real time, can achieve the purpose of debugging multiple breakpoints in the on-chip code at the same time, and debugging efficiency of the on-chip code is improved.