On-Chip Test Data Distribution for Parallel Multi-Die Testing
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Solution Overview
Problem
Testing multiple functional dies in integrated circuits is inefficient and expensive due to the need for a large number of dedicated test pins, which increases circuit size or requires repurposing of pins, and serial application of test data is time-consuming.
Innovation Solution
An on-chip test distribution module (TDM) distributes test data to multiple dies using a small number of integrated circuit pins, allowing concurrent testing of individual dies without requiring dedicated test pins for each, thereby simplifying the design and reducing test time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dedicated test pins are provided for each die, then testing can be performed in parallel, but the number of pins increases significantly
Solution Approach 1:
The patent combines multiple test data streams into a single shared test pin by using a test distribution module that serially receives test data and distributes it to multiple dies. This merging approach allows parallel testing of multiple dies through a single pin, resolving the contradiction between testing efficiency and pin count.
Solution Approach 2:
The test distribution module acts as an intermediary between the single test pin and multiple dies. It receives test data from the external tester through one pin and distributes it to multiple dies in a time-multiplexed manner, enabling efficient resource utilization without requiring dedicated pins for each die.
2Device complexity
If test data is applied serially through a small number of pins, then device complexity is reduced, but testing time increases
Solution Approach 1:
The test distribution module implements periodic action by time-multiplexing the test data distribution to different dies in rapid succession. Each die receives test data in alternating time slots, creating a periodic pattern that enables efficient sequential testing without requiring simultaneous pins for all dies.
Solution Approach 2:
The system dynamically switches the connection between the single test pin and different dies through the test distribution module. This dynamic time-multiplexed switching allows the same physical pin to serve multiple dies sequentially, reducing pin count while maintaining testing efficiency.
3Speed
If multiple pins are used for parallel testing, then testing speed increases, but the integrated circuit size increases
Solution Approach 1:
The patent merges multiple test data pathways into a single shared pin interface by implementing a test distribution module that time-multiplexes test data delivery to multiple dies. This consolidation reduces the area required for pin connections while maintaining parallel testing capability through rapid sequential operation.
Data Source
AI summary
A multi-die integrated circuit uses an on-chip test distribution module to distribute test data to different dies, such as processor chiplets. The test distribution module receives test input data from an external source via one or more integrated circuit pins and distributes the test input data to the different dies, such that the different dies are able to concurrently apply the test data to one or more circuits. Based on application of the test input data the different dies concurrently generate corresponding test results that are used to identify and address design or operation errors at the dies.