On-Die Voltage Sensing and Digital Feedback for Memory Die Power Regulation
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Solution Overview
Problem
Existing memory devices face challenges in accurately regulating power supply due to variations in operating conditions within the memory array, which are not captured by sensors at the device pins, leading to potential malfunctions and performance degradation.
Innovation Solution
Implementing on-die voltage sensors to sense conditions within the memory array and convert the analog feedback signal to a digital signal for transmission to a PMIC, enabling precise voltage regulation based on actual array conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage sensors are placed at device pins for power management, then the system can regulate supply voltage, but the sensors cannot accurately capture operating conditions within the memory array leading to potential malfunctions
Solution Approach 1:
The patent transitions from pin-level voltage sensing to on-die sensor placement, adding spatial dimensionality to the measurement approach. By placing sensors directly on the memory die at multiple locations including within the memory array, the system captures voltage conditions in the previous dimension (external pins) plus new internal dimensions, achieving comprehensive coverage of operating conditions throughout the entire device.
Solution Approach 2:
The patent implements a feedback mechanism where on-die voltage sensors continuously monitor internal operating conditions and feed this information back to the power management circuitry. This feedback loop enables real-time detection and response to voltage deviations within the memory array, allowing dynamic adjustment of power supply to prevent malfunctions and maintain reliability.
2Measurement precision
If on-die sensors are added to capture internal voltage conditions, then measurement precision improves, but device complexity increases
Solution Approach 1:
The patent divides the voltage sensing function into multiple independent sensor units distributed across different locations on the memory die, including within the memory array. Each sensor independently monitors local conditions and provides discrete feedback signals. This segmentation allows the complex task of comprehensive internal monitoring to be broken down into manageable, parallel sensor operations, reducing overall system complexity while maintaining high measurement precision.
Solution Approach 2:
The patent introduces an intermediary signal processing layer between the on-die voltage sensors and the power management circuitry. This intermediary layer, implemented as dedicated circuitry on the memory die, conditions, filters, and transmits sensor signals to external controllers. The intermediary simplifies the interface between internal sensors and external management systems, reducing communication complexity and enabling more robust signal processing.
3Adaptability or versatility
If analog feedback signals are transmitted from on-die sensors, then power regulation can be adjusted, but noise interference degrades signal accuracy
Solution Approach 1:
The patent substitutes the transmission of vulnerable analog signals with a digital communication mechanism. On-die sensors convert their voltage measurements into digital signals that are transmitted to external controllers via robust digital interfaces. This replacement of the continuous analog domain with the discrete digital domain eliminates noise interference that plagues analog transmission, while maintaining the adaptability of voltage regulation through digital signal processing and control algorithms.
Data Source
AI summary
Techniques, apparatus, and devices for managing power in a memory die are described. A memory die may include an array of memory cells and one or more voltage sensors. Each voltage sensor may be on the same substrate as the array of memory cells and may sense a voltage at a location associated with the array. The voltage sensors may generate one or more analog voltage signals that may be converted to one or more digital signals on the memory die. In some cases, the analog voltage signals may be converted to digital signals using an oscillator and a counter on the memory die. The digital signal may be provided to a power management integrated circuit (PMIC), which may adjust a voltage supplied to the array based on the digital signal.