On-line Memory Testing via Register Data Capture
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Solution Overview
Problem
Conventional electronic memory testing schemes require the memory to be offline, failing to detect faults during normal operation, which can lead to adverse consequences in applications like self-driven automobiles where image data distortion may cause accidents.
Innovation Solution
An on-line memory testing system that detects access to test addresses within the electronic memory, saves and compares write and read data to identify faults, and generates an error signal if discrepancies are found, allowing for real-time detection and potential prevention of significant adverse consequences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional off-line memory testing schemes are used, then memory can be tested after power-up or during manufacturing, but memory faults during normal operation cannot be detected
Solution Approach 1:
The system performs preliminary actions by capturing write data in a register subsystem before the actual write operation completes, and then compares this captured data with read data afterward. This preliminary capture of data enables fault detection during normal memory operation without requiring the memory to be taken offline for testing.
2Reliability
If on-line memory testing is implemented, then memory faults can be detected during normal operation, but additional circuitry and complexity are introduced
Solution Approach 1:
The register subsystem serves multiple functions: it acts as both a data capture mechanism for testing and as part of the normal memory write operation pipeline. The address detection module also serves dual purposes by monitoring both test addresses and normal memory access patterns. This multi-functionality reduces the need for entirely separate dedicated test circuitry.
Solution Approach 2:
Instead of creating complex new testing infrastructure, the system creates a copy of the write data in the register subsystem and compares this copy with the read data. This copying approach simplifies the testing mechanism by using redundant data storage rather than complex comparison logic.
3Reliability
If memory testing is performed during normal operation, then faults can be identified before causing significant adverse consequences, but the testing process may alter stored data
Solution Approach 1:
The system performs preliminary capture of write data in the register subsystem before the write operation completes. This captured data is then used for comparison with read data. Because the capture happens preliminarily and non-invasively, the stored data integrity is maintained while enabling fault detection.
Data Source
AI summary
A method for testing an electronic memory while the memory is in use includes: (a) detecting an access to the electronic memory at a test address, (b) saving, in a register subsystem, write data written to the electronic memory at a location corresponding to the test address, (c) comparing the write data to data read from the electronic memory at the location corresponding to the test address to determine whether the memory has a fault, and (d) generating an error signal if the memory has a fault.