Op-Amp Offset Trim Using R-2R RDAC to Cut Circuit Area
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Solution Overview
Problem
Conventional methods for trimming offset voltage in operational amplifiers require large binary-weighted resistors, leading to increased costs and circuit size due to the need for binary-weighted sets of resistors or currents.
Innovation Solution
The use of resistive digital-to-analog converter (RDAC) and current digital-to-analog converter (IDAC) circuits with R-2R ladder structures, which eliminate the need for binary-weighted resistors, reducing overall circuit size and cost by using a trim code to control switches and adjust resistance or current accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If binary-weighted resistors are used for offset trimming, then trimming precision is achieved, but circuit size and cost increase
Solution Approach 1:
The patent changes the resistance parameter from binary-weighted values (R, 2R, 4R, 8R) to equal values (all R). This is achieved by introducing switchable parallel resistor paths, where each resistor position can be connected to ground through switches controlled by trim bits. When switches are closed, the effective resistance at each position becomes R in parallel with other R values, creating the necessary binary-weighted current distribution without requiring binary-weighted resistor values.
Solution Approach 2:
The trim circuit is segmented into multiple identical resistor positions (first, second, third, fourth resistors all with resistance R), each independently controllable through switches. This segmentation allows each resistor to be a standard value rather than requiring progressively larger binary-weighted values, reducing the area required for the resistor array while maintaining trimming precision.
2Measurement precision
If binary-weighted resistors are used for offset trimming, then trimming precision is achieved, but manufacturing cost increases
Solution Approach 1:
The patent changes the resistance parameter from binary-weighted values to equal values, which simplifies the manufacturing process. Standard resistor values can be used throughout the circuit, eliminating the need to fabricate and test progressively larger resistor values. This parameter change reduces manufacturing complexity and cost while maintaining the ability to achieve precise offset trimming through the switch-controlled parallel connection scheme.
Solution Approach 2:
By segmenting the trim circuit into multiple identical resistor units with standard values, the manufacturing process becomes more economical. Each resistor can be fabricated using the same process parameters, improving yield and reducing cost compared to binary-weighted resistors that require varying fabrication conditions to achieve different resistance values.
3Measurement precision
If conventional trim circuits are used, then offset voltage can be trimmed, but device complexity increases
Solution Approach 1:
The patent simplifies the device complexity by changing the resistance parameters to equal values and using a systematic switch-controlled parallel connection scheme. This creates a more regular and predictable circuit structure compared to binary-weighted resistors, making the circuit easier to design, simulate, and manufacture while maintaining full offset trimming capability through the same number of trim bits.
Data Source
AI summary
An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.