Virtual FPGA Fabric Compilation From OpenCL Kernels
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Solution Overview
Problem
Current programmable logic devices require expertise in hardware description languages like VHDL or Verilog for configuration, which can be a barrier for users who prefer higher-level programming languages, and the compilation process is time-consuming, especially for complex designs.
Innovation Solution
The use of OpenCL as a high-level programming language for configuring programmable devices, where kernels are compiled into hardware circuits using a Low-Level Virtual Machine compiler, and precompiled virtual fabrics are employed to speed up the configuration process by selecting from a library of preconfigured virtual fabrics that match the user's logic design needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If hardware description languages (VHDL/Verilog) are used for configuring programmable devices, then configuration capability and device control are improved, but user accessibility and ease of operation deteriorate due to the complexity barrier
Solution Approach 1:
The patent introduces an intermediate high-level language interface that mediates between the user and the hardware description language. This intermediate layer translates user-friendly commands into the required VHDL/Verilog code, allowing users to configure programmable devices without directly learning complex hardware description languages, thus resolving the contradiction between ease of operation and device complexity
2Adaptability or versatility
If comprehensive programming software with pre-defined functions is provided, then device configuration capability is improved, but software complexity and learning curve increase
Solution Approach 1:
The patent segments the programming software into modular components with clearly defined functions. By organizing the software into separate modules that handle different configuration tasks independently, the system provides comprehensive configuration capability while reducing overall software complexity. Users can selectively use only the modules they need, avoiding the need to learn the entire software suite
3Productivity
If manual logic layout is attempted for early programmable devices, then simplicity and direct control are improved, but time consumption and productivity deteriorate for larger devices
Solution Approach 1:
The patent implements preliminary action by pre-compiling and storing commonly used logic functions and configurations in a library. When users need to configure their devices, they can select from these pre-prepared templates and functions, significantly reducing the time required for configuration and compilation compared to creating everything from scratch, thus resolving the contradiction between productivity and time loss
Data Source
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AI summary
A method of preparing a programmable integrated circuit device for configuration using a high-level language includes compiling a plurality of virtual programmable devices from descriptions in said high-level language. That compiling includes compiling configurations of configurable routing resources from programmable resources of said programmable integrated circuit device, and compiling configurations of a plurality of complex function blocks from programmable resources of said programmable integrated circuit device. A machine-readable data storage medium may be encoded with a library of such compiled configurations. A virtual programmable device may include a stall signal network and routing switches of the virtual programmable device may include stall signal inputs and outputs.