Optical Co-Packaging on Glass Substrate with 3D Die-Stacking

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Solution Overview

Problem

Existing approaches for transferring optical signals from optical fibers to electronic integrated circuit components require additional space for photonic integrated circuits, leading to increased substrate size and inefficiencies in optical interconnection.

Innovation Solution

A multi-die layered structure is developed, where primary IC dies and corresponding PIC dies are stacked with electrical integrated circuits (EICs) for interconnection, and photonic waveguide bonds (PWBs) or optical couplers with micro-lens arrays are used to connect waveguides in PIC dies with waveguides in the substrate, enabling optical communication between stacked dies and the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a photonic integrated circuit is attached to the substrate to transfer optical signals from optical fibers to electronic integrated circuit components, then optical signal transfer capability is improved, but substrate area increases

Engineering Contradiction:
Improveoptical signal transfer capabilityVSAvoidsubstrate area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the photonic integrated circuit (PIC) and electronic integrated circuit (EIC) onto a single substrate, forming an optical co-packaging structure. This integration allows optical signal transfer functionality to be combined with electronic processing on the same substrate, eliminating the need for separate PIC and EIC components and reducing overall substrate area while maintaining optical signal transfer capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a planar two-dimensional substrate layout to a three-dimensional stacked architecture. Multiple EICs are stacked vertically and interconnected via through-substrate vias, allowing optical and electronic circuits to occupy different vertical layers. This dimensional change enables higher component density and reduces the horizontal footprint of the substrate.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If additional photonic integrated circuits are mounted on the substrate for each integrated circuit component, then optical interconnection capability is improved, but device complexity increases

Engineering Contradiction:
Improveoptical interconnection capabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal substrate structure that can accommodate multiple EICs and optical interconnections through a standardized co-packaging approach. The substrate includes integrated waveguides, couplers, and via structures that provide multi-functional capabilities for both optical signal routing and electrical interconnection, reducing the need for separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the substrate into functional regions including optical input regions, waveguide layers, coupling regions, and electrical interconnection regions. This segmentation allows independent optimization of optical and electrical pathways while maintaining overall system integration, reducing complexity by organizing functions into distinct modular zones within the substrate.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250110270A1Optical co-packaging on a glass substrate with 3D die-stacking
Publication Date: 2025.04.03 ALTERA CORP
  • US20250110270A1 patent drawing
  • US20250110270A1 patent drawing
  • US20250110270A1 patent drawing

AI summary

The substrate of an integrated circuit component comprises a multi-layer die structure conductively coupled to the substrate. The multi-die layered structure includes a first primary integrated circuit die attached to the substrate and communicatively coupled to a first photonic integrated circuit (PIC) die, and a second primary integrated circuit die vertically spaced from the first primary integrated circuit die and communicatively coupled to a second PIC die. The integrated circuit component further includes a first intermediate waveguide optically coupling a first PIC waveguide of the first PIC die to a first substrate waveguide in the substrate, and a second intermediate waveguide optically coupling a second PIC waveguide of the second PIC die to a second substrate waveguide in the substrate. The integrated circuit component may further include a third intermediate waveguide optically coupling the first PIC die to the second PIC die.